From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754684AbdDNRNf (ORCPT ); Fri, 14 Apr 2017 13:13:35 -0400 Received: from mx2.suse.de ([195.135.220.15]:42312 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751612AbdDNRNc (ORCPT ); Fri, 14 Apr 2017 13:13:32 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: linux-arm-kernel@lists.infradead.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , Maxime Ripard , Chen-Yu Tsai , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: dts: allwinner: a64: Add UART2 pin nodes Date: Fri, 14 Apr 2017 19:13:20 +0200 Message-Id: <20170414171320.19743-1-afaerber@suse.de> X-Mailer: git-send-email 2.10.2 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org UART2 is exposed on the Pi connector of Pine64. Make a pinctrl node available at the SoC level, to simplify enabling UART2 via DT overlay. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index 1c64ea2d23f9..61d3a19659bf 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -285,6 +285,11 @@ pins = "PG8", "PG9"; function = "uart1"; }; + + uart2_pins: uart2-pins { + pins = "PB0", "PB1"; + function = "uart2"; + }; }; uart0: serial@1c28000 { -- 2.10.2