From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932413AbdDRVOy (ORCPT ); Tue, 18 Apr 2017 17:14:54 -0400 Received: from mail-dm3nam03on0086.outbound.protection.outlook.com ([104.47.41.86]:50400 "EHLO NAM03-DM3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1755893AbdDRVOh (ORCPT ); Tue, 18 Apr 2017 17:14:37 -0400 Authentication-Results: vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=none action=none header.from=amd.com; From: Tom Lendacky Subject: [PATCH v5 02/32] x86/mm/pat: Set write-protect cache mode for full PAT support To: , , , , , , , , , CC: Rik van Riel , Radim =?utf-8?b?S3LEjW3DocWZ?= , Toshimitsu Kani , Arnd Bergmann , Jonathan Corbet , Matt Fleming , "Michael S. Tsirkin" , Joerg Roedel , Konrad Rzeszutek Wilk , Paolo Bonzini , Larry Woodman , Brijesh Singh , Ingo Molnar , Borislav Petkov , Andy Lutomirski , "H. Peter Anvin" , Andrey Ryabinin , Alexander Potapenko , Dave Young , Thomas Gleixner , Dmitry Vyukov Date: Tue, 18 Apr 2017 16:14:21 -0500 Message-ID: <20170418211421.9689.37916.stgit@tlendack-t1.amdoffice.net> In-Reply-To: <20170418211400.9689.10175.stgit@tlendack-t1.amdoffice.net> References: <20170418211400.9689.10175.stgit@tlendack-t1.amdoffice.net> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: BN6PR03CA0031.namprd03.prod.outlook.com (10.175.124.17) To BN6PR12MB1140.namprd12.prod.outlook.com (10.168.226.142) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 706a7fc7-2ce9-4a56-5383-08d4869fe481 X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(22001)(48565401081)(201703131423075)(201703031133081);SRVR:BN6PR12MB1140; X-Microsoft-Exchange-Diagnostics: 1;BN6PR12MB1140;3:XXCEVuzfQArTfloyAFByQccgl0XFk3/ArYO74xeY1/voVmWjklpgzMxGIyNtYPE5i8Mz+avO74h4eU6cr9fuQbKr/WVTUohBelT3XJIe4d7jAbXbFeojPo/EdyRWjXR36T3lOEUCKlTA3mhWolSYOQJXx3Bg08eCIflSa/0PrsOwLK+aJfQIxmtSMd1x7kTdd2vd7vZE3P6xf1EjsuDawYPSNQCOm4kAow3u/iTAZ48scZAstUCSPGoyNCPMaAp/X1HK8FiTeA+ZN3zbUd+BAI4Yip3Z001gaztHR2bDIZgmrfvkfyMZxE/NpyBzAhmXWQB1Uk8RZKthbldO16Jlnvx6t6TnbbcnQdawQeCedTg=;25:O+8+nNq6nOuQfc8oCRPvJxUOXdVTmzpr06M1fhKwWmRUsJe81P6IUBH8KCm+a2MB8INxQnkRSZlfM5VsWfJ10eaaKCIJsCb2sYCWkqcU9SYBlsTp9w7G0mh4jabKLDb85+CAnbtFMt+/7oNacZsDLeJkydMzCLMrqjih/midthOpFt+Y0PSH4p6EtxZ/rXD+DPPOzQlYpNAcSRqi0GfbKrtuKdoXRv6qirGzj3dlpa6csOhCO+q3gBm3OfTdXTyUm4pQ/W21+2WB39cgPsR1nHRJX7ZlcRQdvXoS6cy1X+JnpFxtepRjCIqQYKgxMdGhSgudogyuEzsS4nOG841jcZvY4Xmi2obCnj2gGCaRSTWT6cus/5UKv2C3o7JlMEHQiWgif0crGlhoqb0eJJs5wXsfZ9FMD4skFOyL0fPwQGuan/w9krb0Rj3emOGnY0oucBge0bKk8OmkiUMvKLwfqw== X-Microsoft-Exchange-Diagnostics: 1;BN6PR12MB1140;31:PUCEngd1ozQuvjPTn62HB0c742ytpBR6sN5T8dFaUCXodD0gYBi/A/8IxNGkmwK/aj5ksqc/VSthB2Y7ItJn+TOo5Fy3Ms8xIWYRPKv6yVvGxyqQA3DMH3l71hQ9DpxyIslkJx893I9/YPoR9O+B8vmGWufjqEJk1kH4YQpOqcuy0WL8eZdxN1OxP+kXLZPl6lTnBDHyC9PyO9bB/4WvR0IAK343wnT1hJJUzdCe5hdhH7vYywBWgzgyd7Yqm214VDE+HrwRGKDh+KMAPBi4XA==;20:MKqcyplxsWuMOZ5/d8HtaMmd9N6+l+jx1ab10h4p1wEIzcrIDhKbeCiKLi5FVxYlUS7hmKqcVSxRRb75nIMOPj5453P+aZnGicPqgnr2daw6lsyYvSuj0vkr01nfHm8TUbM3W2EjU+/ecNxCdY2PRGzSezB/1mnUGKX1RhMK7C9u+R85wLzc1dXCkM5YhmtL4zWvmxDX9ee2XaJaC//HMMqeYrtKyW68NIz28erJGctHEg1eqb5i+Kju2tfq2rasMgcVO4q353tX0x8HyJTo9yJan+HlYGujmFRBirxwKYh/SJiZ86Drrx/ebStgi7GRY/NoNkIiXSEmH1Lir8e/ciNAuGWby0PAzeMU1cm+WVBFQ2bHllTA3yuxxa5wo9s9uV/YFeS01FP//jmFV/KONcp4LkrUPHCs+/YSpWD093jiorO6FuEF/EEu9m3cHL31p1QKExZB2G1DXtMnr2elYJdxBodUCMMhzQizioF29nuI5qWkhGB2lP/DQ+gycVC2 X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(767451399110); 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Acked-by: Borislav Petkov Signed-off-by: Tom Lendacky --- arch/x86/mm/pat.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c index 9b78685..6753d9c 100644 --- a/arch/x86/mm/pat.c +++ b/arch/x86/mm/pat.c @@ -295,7 +295,7 @@ static void init_cache_modes(void) * pat_init - Initialize PAT MSR and PAT table * * This function initializes PAT MSR and PAT table with an OS-defined value - * to enable additional cache attributes, WC and WT. + * to enable additional cache attributes, WC, WT and WP. * * This function must be called on all CPUs using the specific sequence of * operations defined in Intel SDM. mtrr_rendezvous_handler() provides this @@ -356,7 +356,7 @@ void pat_init(void) * 010 2 UC-: _PAGE_CACHE_MODE_UC_MINUS * 011 3 UC : _PAGE_CACHE_MODE_UC * 100 4 WB : Reserved - * 101 5 WC : Reserved + * 101 5 WP : _PAGE_CACHE_MODE_WP * 110 6 UC-: Reserved * 111 7 WT : _PAGE_CACHE_MODE_WT * @@ -364,7 +364,7 @@ void pat_init(void) * corresponding types in the presence of PAT errata. */ pat = PAT(0, WB) | PAT(1, WC) | PAT(2, UC_MINUS) | PAT(3, UC) | - PAT(4, WB) | PAT(5, WC) | PAT(6, UC_MINUS) | PAT(7, WT); + PAT(4, WB) | PAT(5, WP) | PAT(6, UC_MINUS) | PAT(7, WT); } if (!boot_cpu_done) {