From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1422804AbdDURIE (ORCPT ); Fri, 21 Apr 2017 13:08:04 -0400 Received: from bombadil.infradead.org ([65.50.211.133]:43438 "EHLO bombadil.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1422768AbdDURHp (ORCPT ); Fri, 21 Apr 2017 13:07:45 -0400 Message-Id: <20170421150733.898026534@infradead.org> User-Agent: quilt/0.63-1 Date: Fri, 21 Apr 2017 16:57:57 +0200 From: Peter Zijlstra To: tglx@linutronix.de, mingo@kernel.org Cc: linux-kernel@vger.kernel.org, ville.syrjala@linux.intel.com, daniel.lezcano@linaro.org, rafael.j.wysocki@intel.com, marta.lofstedt@intel.com, martin.peres@linux.intel.com, pasha.tatashin@oracle.com, peterz@infradead.org, daniel.vetter@ffwll.ch Subject: [PATCH 1/9] x86/tsc: Provide tsc=unstable boot parameter References: <20170421145756.305735607@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline; filename=peterz-sched-clock-rubarb-1.patch Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Since the clocksource watchdog will only detect broken TSC after the fact, all TSC based clocks will likely have observed non-continuous values before/when switching away from TSC. Therefore only thing to fully avoid random clock movement when your BIOS randomly mucks with TSC values from SMI handlers is reporting the TSC as unstable at boot. Signed-off-by: Peter Zijlstra (Intel) --- arch/x86/kernel/tsc.c | 2 ++ 1 file changed, 2 insertions(+) --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -374,6 +374,8 @@ static int __init tsc_setup(char *str) tsc_clocksource_reliable = 1; if (!strncmp(str, "noirqtime", 9)) no_sched_irq_time = 1; + if (!strcmp(str, "unstable")) + mark_tsc_unstable("boot parameter"); return 1; }