From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1949958AbdDYPZu (ORCPT ); Tue, 25 Apr 2017 11:25:50 -0400 Received: from mirror2.csie.ntu.edu.tw ([140.112.30.76]:42098 "EHLO wens.csie.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1949899AbdDYPZL (ORCPT ); Tue, 25 Apr 2017 11:25:11 -0400 From: Chen-Yu Tsai To: Maxime Ripard , David Airlie , Rob Herring , Mark Rutland Cc: Chen-Yu Tsai , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [PATCH 2/3] drm/sun4i: Set TCON clock inside sun4i_tconX_mode_set Date: Tue, 25 Apr 2017 23:25:04 +0800 Message-Id: <20170425152505.6796-3-wens@csie.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170425152505.6796-1-wens@csie.org> References: <20170425152505.6796-1-wens@csie.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Currently we are configuring the TCON's dot clock or special clock directly from the encoder mode_set functions. Since we already provide mode_set helper functions for the TCON's 2 channels, we can set the respective clock from those helpers, and reduce the exposure of the TCON's internals. Signed-off-by: Chen-Yu Tsai --- drivers/gpu/drm/sun4i/sun4i_rgb.c | 2 -- drivers/gpu/drm/sun4i/sun4i_tcon.c | 6 ++++++ drivers/gpu/drm/sun4i/sun4i_tv.c | 2 -- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c b/drivers/gpu/drm/sun4i/sun4i_rgb.c index 1147451eb993..51ece4c39d7e 100644 --- a/drivers/gpu/drm/sun4i/sun4i_rgb.c +++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c @@ -175,8 +175,6 @@ static void sun4i_rgb_encoder_mode_set(struct drm_encoder *encoder, sun4i_tcon0_mode_set(tcon, mode); - clk_set_rate(tcon->dclk, mode->crtc_clock * 1000); - /* FIXME: This seems to be board specific */ clk_set_phase(tcon->dclk, 120); } diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 8301389c411d..29fd829aa54c 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -131,6 +131,9 @@ void sun4i_tcon0_mode_set(struct sun4i_tcon *tcon, u8 clk_delay; u32 val = 0; + /* Configure the dot clock */ + clk_set_rate(tcon->dclk, mode->crtc_clock * 1000); + /* Adjust clock delay */ clk_delay = sun4i_tcon_get_clk_delay(mode, 0); regmap_update_bits(tcon->regs, SUN4I_TCON0_CTL_REG, @@ -206,6 +209,9 @@ void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, WARN_ON(!tcon->quirks->has_channel_1); + /* Configure the dot clock */ + clk_set_rate(tcon->sclk1, mode->crtc_clock * 1000); + /* Adjust clock delay */ clk_delay = sun4i_tcon_get_clk_delay(mode, 1); regmap_update_bits(tcon->regs, SUN4I_TCON1_CTL_REG, diff --git a/drivers/gpu/drm/sun4i/sun4i_tv.c b/drivers/gpu/drm/sun4i/sun4i_tv.c index 49c49431a053..542da220818b 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tv.c +++ b/drivers/gpu/drm/sun4i/sun4i_tv.c @@ -486,8 +486,6 @@ static void sun4i_tv_mode_set(struct drm_encoder *encoder, SUN4I_TVE_RESYNC_FIELD : 0)); regmap_write(tv->regs, SUN4I_TVE_SLAVE_REG, 0); - - clk_set_rate(tcon->sclk1, mode->crtc_clock * 1000); } static struct drm_encoder_helper_funcs sun4i_tv_helper_funcs = { -- 2.11.0