From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751615AbdESO2n (ORCPT ); Fri, 19 May 2017 10:28:43 -0400 Received: from mail.kernel.org ([198.145.29.99]:60184 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750746AbdESO2m (ORCPT ); Fri, 19 May 2017 10:28:42 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9C5032395D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=mhiramat@kernel.org Date: Fri, 19 May 2017 23:28:26 +0900 From: Masami Hiramatsu To: Adrian Hunter Cc: Arnaldo Carvalho de Melo , linux-kernel@vger.kernel.org Subject: Re: [PATCH] x86/insn: perf tools: Add new ptwrite instruction Message-Id: <20170519232826.05f6396fe22a0faa099b1d07@kernel.org> In-Reply-To: <1495180230-19367-1-git-send-email-adrian.hunter@intel.com> References: <1495180230-19367-1-git-send-email-adrian.hunter@intel.com> X-Mailer: Sylpheed 3.5.0 (GTK+ 2.24.31; x86_64-redhat-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 19 May 2017 10:50:30 +0300 Adrian Hunter wrote: > Add ptwrite to the op code map and the perf tools new instructions test. > To run the test: > > $ tools/perf/perf test "x86 ins" > 39: Test x86 instruction decoder - new instructions : Ok > > Or to see the details: > > $ tools/perf/perf test -v "x86 ins" 2>&1 | grep ptwrite > > For information about ptwrite, refer the Intel SDM. > OK, I've checked that this exists at least "March 2017" revision. (But Table A-6 is not updated... sigh) Looks good to me. Acked-by: Masami Hiramatsu Thank you, > Signed-off-by: Adrian Hunter > --- > arch/x86/lib/x86-opcode-map.txt | 2 +- > tools/objtool/arch/x86/insn/x86-opcode-map.txt | 2 +- > tools/perf/arch/x86/tests/insn-x86-dat-32.c | 12 +++++++++ > tools/perf/arch/x86/tests/insn-x86-dat-64.c | 30 ++++++++++++++++++++++ > tools/perf/arch/x86/tests/insn-x86-dat-src.c | 30 ++++++++++++++++++++++ > .../perf/util/intel-pt-decoder/x86-opcode-map.txt | 2 +- > 6 files changed, 75 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt > index 767be7c76034..12e377184ee4 100644 > --- a/arch/x86/lib/x86-opcode-map.txt > +++ b/arch/x86/lib/x86-opcode-map.txt > @@ -1009,7 +1009,7 @@ GrpTable: Grp15 > 1: fxstor | RDGSBASE Ry (F3),(11B) > 2: vldmxcsr Md (v1) | WRFSBASE Ry (F3),(11B) > 3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B) > -4: XSAVE > +4: XSAVE | ptwrite Ey (F3),(11B) > 5: XRSTOR | lfence (11B) > 6: XSAVEOPT | clwb (66) | mfence (11B) > 7: clflush | clflushopt (66) | sfence (11B) > diff --git a/tools/objtool/arch/x86/insn/x86-opcode-map.txt b/tools/objtool/arch/x86/insn/x86-opcode-map.txt > index 767be7c76034..12e377184ee4 100644 > --- a/tools/objtool/arch/x86/insn/x86-opcode-map.txt > +++ b/tools/objtool/arch/x86/insn/x86-opcode-map.txt > @@ -1009,7 +1009,7 @@ GrpTable: Grp15 > 1: fxstor | RDGSBASE Ry (F3),(11B) > 2: vldmxcsr Md (v1) | WRFSBASE Ry (F3),(11B) > 3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B) > -4: XSAVE > +4: XSAVE | ptwrite Ey (F3),(11B) > 5: XRSTOR | lfence (11B) > 6: XSAVEOPT | clwb (66) | mfence (11B) > 7: clflush | clflushopt (66) | sfence (11B) > diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-32.c b/tools/perf/arch/x86/tests/insn-x86-dat-32.c > index 0f196eec9f48..3cbf6fad169f 100644 > --- a/tools/perf/arch/x86/tests/insn-x86-dat-32.c > +++ b/tools/perf/arch/x86/tests/insn-x86-dat-32.c > @@ -1664,3 +1664,15 @@ > "0f c7 1d 78 56 34 12 \txrstors 0x12345678",}, > {{0x0f, 0xc7, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", > "0f c7 9c c8 78 56 34 12 \txrstors 0x12345678(%eax,%ecx,8)",}, > +{{0xf3, 0x0f, 0xae, 0x20, }, 4, 0, "", "", > +"f3 0f ae 20 \tptwritel (%eax)",}, > +{{0xf3, 0x0f, 0xae, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", > +"f3 0f ae 25 78 56 34 12 \tptwritel 0x12345678",}, > +{{0xf3, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", > +"f3 0f ae a4 c8 78 56 34 12 \tptwritel 0x12345678(%eax,%ecx,8)",}, > +{{0xf3, 0x0f, 0xae, 0x20, }, 4, 0, "", "", > +"f3 0f ae 20 \tptwritel (%eax)",}, > +{{0xf3, 0x0f, 0xae, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", > +"f3 0f ae 25 78 56 34 12 \tptwritel 0x12345678",}, > +{{0xf3, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", > +"f3 0f ae a4 c8 78 56 34 12 \tptwritel 0x12345678(%eax,%ecx,8)",}, > diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-64.c b/tools/perf/arch/x86/tests/insn-x86-dat-64.c > index af25bc8240d0..aa512fa944dd 100644 > --- a/tools/perf/arch/x86/tests/insn-x86-dat-64.c > +++ b/tools/perf/arch/x86/tests/insn-x86-dat-64.c > @@ -1696,3 +1696,33 @@ > "0f c7 9c c8 78 56 34 12 \txrstors 0x12345678(%rax,%rcx,8)",}, > {{0x41, 0x0f, 0xc7, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", > "41 0f c7 9c c8 78 56 34 12 \txrstors 0x12345678(%r8,%rcx,8)",}, > +{{0xf3, 0x0f, 0xae, 0x20, }, 4, 0, "", "", > +"f3 0f ae 20 \tptwritel (%rax)",}, > +{{0xf3, 0x41, 0x0f, 0xae, 0x20, }, 5, 0, "", "", > +"f3 41 0f ae 20 \tptwritel (%r8)",}, > +{{0xf3, 0x0f, 0xae, 0x24, 0x25, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", > +"f3 0f ae 24 25 78 56 34 12 \tptwritel 0x12345678",}, > +{{0xf3, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", > +"f3 0f ae a4 c8 78 56 34 12 \tptwritel 0x12345678(%rax,%rcx,8)",}, > +{{0xf3, 0x41, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", > +"f3 41 0f ae a4 c8 78 56 34 12 \tptwritel 0x12345678(%r8,%rcx,8)",}, > +{{0xf3, 0x0f, 0xae, 0x20, }, 4, 0, "", "", > +"f3 0f ae 20 \tptwritel (%rax)",}, > +{{0xf3, 0x41, 0x0f, 0xae, 0x20, }, 5, 0, "", "", > +"f3 41 0f ae 20 \tptwritel (%r8)",}, > +{{0xf3, 0x0f, 0xae, 0x24, 0x25, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", > +"f3 0f ae 24 25 78 56 34 12 \tptwritel 0x12345678",}, > +{{0xf3, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", > +"f3 0f ae a4 c8 78 56 34 12 \tptwritel 0x12345678(%rax,%rcx,8)",}, > +{{0xf3, 0x41, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", > +"f3 41 0f ae a4 c8 78 56 34 12 \tptwritel 0x12345678(%r8,%rcx,8)",}, > +{{0xf3, 0x48, 0x0f, 0xae, 0x20, }, 5, 0, "", "", > +"f3 48 0f ae 20 \tptwriteq (%rax)",}, > +{{0xf3, 0x49, 0x0f, 0xae, 0x20, }, 5, 0, "", "", > +"f3 49 0f ae 20 \tptwriteq (%r8)",}, > +{{0xf3, 0x48, 0x0f, 0xae, 0x24, 0x25, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", > +"f3 48 0f ae 24 25 78 56 34 12 \tptwriteq 0x12345678",}, > +{{0xf3, 0x48, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", > +"f3 48 0f ae a4 c8 78 56 34 12 \tptwriteq 0x12345678(%rax,%rcx,8)",}, > +{{0xf3, 0x49, 0x0f, 0xae, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 10, 0, "", "", > +"f3 49 0f ae a4 c8 78 56 34 12 \tptwriteq 0x12345678(%r8,%rcx,8)",}, > diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-src.c b/tools/perf/arch/x86/tests/insn-x86-dat-src.c > index 979487dae8d4..6cdb65d25b79 100644 > --- a/tools/perf/arch/x86/tests/insn-x86-dat-src.c > +++ b/tools/perf/arch/x86/tests/insn-x86-dat-src.c > @@ -1343,6 +1343,26 @@ int main(void) > asm volatile("xrstors 0x12345678(%rax,%rcx,8)"); > asm volatile("xrstors 0x12345678(%r8,%rcx,8)"); > > + /* ptwrite */ > + > + asm volatile("ptwrite (%rax)"); > + asm volatile("ptwrite (%r8)"); > + asm volatile("ptwrite (0x12345678)"); > + asm volatile("ptwrite 0x12345678(%rax,%rcx,8)"); > + asm volatile("ptwrite 0x12345678(%r8,%rcx,8)"); > + > + asm volatile("ptwritel (%rax)"); > + asm volatile("ptwritel (%r8)"); > + asm volatile("ptwritel (0x12345678)"); > + asm volatile("ptwritel 0x12345678(%rax,%rcx,8)"); > + asm volatile("ptwritel 0x12345678(%r8,%rcx,8)"); > + > + asm volatile("ptwriteq (%rax)"); > + asm volatile("ptwriteq (%r8)"); > + asm volatile("ptwriteq (0x12345678)"); > + asm volatile("ptwriteq 0x12345678(%rax,%rcx,8)"); > + asm volatile("ptwriteq 0x12345678(%r8,%rcx,8)"); > + > #else /* #ifdef __x86_64__ */ > > /* bound r32, mem (same op code as EVEX prefix) */ > @@ -2653,6 +2673,16 @@ int main(void) > asm volatile("xrstors (0x12345678)"); > asm volatile("xrstors 0x12345678(%eax,%ecx,8)"); > > + /* ptwrite */ > + > + asm volatile("ptwrite (%eax)"); > + asm volatile("ptwrite (0x12345678)"); > + asm volatile("ptwrite 0x12345678(%eax,%ecx,8)"); > + > + asm volatile("ptwritel (%eax)"); > + asm volatile("ptwritel (0x12345678)"); > + asm volatile("ptwritel 0x12345678(%eax,%ecx,8)"); > + > #endif /* #ifndef __x86_64__ */ > > /* Following line is a marker for the awk script - do not change */ > diff --git a/tools/perf/util/intel-pt-decoder/x86-opcode-map.txt b/tools/perf/util/intel-pt-decoder/x86-opcode-map.txt > index 767be7c76034..12e377184ee4 100644 > --- a/tools/perf/util/intel-pt-decoder/x86-opcode-map.txt > +++ b/tools/perf/util/intel-pt-decoder/x86-opcode-map.txt > @@ -1009,7 +1009,7 @@ GrpTable: Grp15 > 1: fxstor | RDGSBASE Ry (F3),(11B) > 2: vldmxcsr Md (v1) | WRFSBASE Ry (F3),(11B) > 3: vstmxcsr Md (v1) | WRGSBASE Ry (F3),(11B) > -4: XSAVE > +4: XSAVE | ptwrite Ey (F3),(11B) > 5: XRSTOR | lfence (11B) > 6: XSAVEOPT | clwb (66) | mfence (11B) > 7: clflush | clflushopt (66) | sfence (11B) > -- > 1.9.1 > -- Masami Hiramatsu