From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759037AbdEVLNC (ORCPT ); Mon, 22 May 2017 07:13:02 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:36624 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759007AbdEVLMz (ORCPT ); Mon, 22 May 2017 07:12:55 -0400 Date: Mon, 22 May 2017 13:12:48 +0200 From: Ingo Molnar To: Josh Poimboeuf Cc: "H. Peter Anvin" , linux-kernel@vger.kernel.org, Jiri Slaby , Andrew Morton , live-patching@vger.kernel.org, Thomas Gleixner , Ingo Molnar , the arch/x86 maintainers , Andy Lutomirski , Jiri Kosina , Linus Torvalds Subject: Re: [PATCH 7/7] DWARF: add the config option Message-ID: <20170522111248.q74jgpqlwxl5oby7@gmail.com> References: <20170505122200.31436-1-jslaby@suse.cz> <20170505122200.31436-7-jslaby@suse.cz> <20170507165524.cdxfuwbd5alr7v6k@treble> <20170519205354.caeyqri2k6gvso3w@treble> <8dbbb971-fc41-fba2-f356-931a7eabe6ef@zytor.com> <20170519212913.otir6mlujoxoy3ha@treble> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170519212913.otir6mlujoxoy3ha@treble> User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Josh Poimboeuf wrote: > > How are you handling control flow? > > Control flow of what? > > > > Here's the struct in its current state: > > > > > > #define UNDWARF_REG_UNDEFINED 0 > > > #define UNDWARF_REG_CFA 1 > > > #define UNDWARF_REG_SP 2 > > > #define UNDWARF_REG_FP 3 > > > #define UNDWARF_REG_SP_INDIRECT 4 > > > #define UNDWARF_REG_FP_INDIRECT 5 > > > #define UNDWARF_REG_R10 6 > > > #define UNDWARF_REG_DI 7 > > > #define UNDWARF_REG_DX 8 > > > > > > > Why only those registers? Also, if you have the option I would really > > suggest using the actual x86 register numbers (ax, ex, dx, bx, sp, bp, > > si, di, r8-r15 in that order.) > > Those are the only registers which are ever needed as the base for > finding the previous stack frame. 99% of the time it's sp or bp, the > other registers are needed for aligned stacks and entry code. > > Using the actual register numbers isn't an option because I don't need > them all and they need to fit in a small number of bits. > > This construct might be useful for other arches, which is why I called > it "FP" instead of "BP". But then I ruined that with the last 3 :-) Please call it BP - 'FP' can easily be read as floating-point, making it all super-confusing. We should use canonical x86 register names and ordering - even if not all registers are used straight away. Thanks, Ingo