From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750993AbdE2HBQ (ORCPT ); Mon, 29 May 2017 03:01:16 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:50971 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750844AbdE2HBO (ORCPT ); Mon, 29 May 2017 03:01:14 -0400 Date: Mon, 29 May 2017 09:01:03 +0200 From: Maxime Ripard To: Icenowy Zheng Cc: Chen-Yu Tsai , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: Re: [PATCH 2/3] ARM: sun8i: v3s: add PWM pinmux nodes Message-ID: <20170529070103.bsmvqmxnflapm6wy@flea.home> References: <20170524121320.4171-1-icenowy@aosc.io> <20170524121320.4171-2-icenowy@aosc.io> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="si5ayuikvcyve6th" Content-Disposition: inline In-Reply-To: <20170524121320.4171-2-icenowy@aosc.io> User-Agent: NeoMutt/20170428 (1.8.2) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --si5ayuikvcyve6th Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, On Wed, May 24, 2017 at 08:13:19PM +0800, Icenowy Zheng wrote: > Allwinner V3s have two PWM channels, the first channel can be only at > PB4 pin, and the second channel PB5. >=20 > Add their pinmux configurations. >=20 > Signed-off-by: Icenowy Zheng > --- > arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) >=20 > diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v= 3s.dtsi > index bb080c4bd22c..db3328a2c89a 100644 > --- a/arch/arm/boot/dts/sun8i-v3s.dtsi > +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi > @@ -239,6 +239,16 @@ > pins =3D "PC0", "PC1", "PC2", "PC3"; > function =3D "spi0"; > }; > + > + pwm0_pins: pwm0 { > + pins =3D "PB4"; > + function =3D "pwm0"; > + }; > + > + pwm1_pins: pwm1 { > + pins =3D "PB5"; > + function =3D "pwm1"; > + }; Please order the nodes alphabetically. Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com --si5ayuikvcyve6th Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIcBAEBAgAGBQJZK8cvAAoJEBx+YmzsjxAgYbEQAIfDndFdcCmDqJxhPiztEtLK ebaL5U2tlvMSAtQijXMYzhJrZnR0I8bWC4K7w1m3bmgvRTV3qREkOYeUO/X5E9Ed GQJ47b4R74fGDnahRwh0cskRDYJmby+/swbtts8p4EeojPv85SIlT7/JzTbff5oa fqJFynMfZgqOOTKzyGavGA4gEzvBGGQVAtrR6PUI6YInBUrBg9Ypc8YyUJ42U1Xv s0stHqczFN1w6iXtul0YMC3GPb9VCr5lLyZ4q5e2G4K0Mogc07q7+nGg2+FwVoKV mUzV7HhHslaf0A2Nh6rhNYdpBAAWrVOzhm+CRpW8R2ZzkkhLyEqrU0E+FiMyyiDX CgcU46LrUVSEWhco13N0vyyL5lT9m+X3pxNRCxtaBg/Seb5hW81pCc7LWbruTzu6 GhhRg8TW2SrmvJUtC3jtO12nPuFQIkqAkDOxw1L/NRQ34RaxrHyQyK8pGBPGk61l L45jMxyPIxyUz7bb7JJa+joPDAV2R8n/oZlKtajX6AvIeoeIV+ux7UafWe4WVRZc 0UstF1qkhWio6lJA2NrnZwHR68g07sS2goTgJ6diNT5jGTj3lD7VsyHsKrsVUKw3 RStfNfcb4DSt26Ce0xHph6P8Il2LsYCYhBiyILNl8SV00M0UXVeoNi8toKAOoq2Y +ojJ5aS4g07GwGNXhFpb =HdhG -----END PGP SIGNATURE----- --si5ayuikvcyve6th--