From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751236AbdEaSix (ORCPT ); Wed, 31 May 2017 14:38:53 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:47443 "EHLO out1-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751011AbdEaSiv (ORCPT ); Wed, 31 May 2017 14:38:51 -0400 X-ME-Sender: X-Sasl-enc: 55W3SU9wt/ESGZR8D2nlVHe3Wz+p/AdhORTK2ssaxNHP 1496255930 Date: Wed, 31 May 2017 15:38:47 -0300 From: Henrique de Moraes Holschuh To: Peter Zijlstra Cc: tglx@linutronix.de, x86@kernel.org, linux-kernel@vger.kernel.org, kevin.b.stanton@intel.com Subject: Re: [PATCH 0/3] x86: TSC_DEADLINE vs TSC_ADJUST and microcode revisions Message-ID: <20170531183846.GB31565@khazad-dum.debian.net> References: <20170531155201.218077283@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170531155201.218077283@infradead.org> X-GPG-Fingerprint1: 4096R/0x0BD9E81139CB4807: C467 A717 507B BAFE D3C1 6092 0BD9 E811 39CB 4807 User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 31 May 2017, Peter Zijlstra wrote: > These patches rely on the latest microcode data files from Intel [*] > > Without this microcode loaded, we'll print a FW_BUG informing the user to > update their microcode image and disable TSC_DEADLINE support. > > This in turn allows us to remove the TSC_ADJUST workarounds which were required > due to errata. Thanks! On a related note, maybe it would be possible to do something about SKL150/SKX150/KBL095 as well? Working around that errata requires disabling hyperthreads on Skylake when microcode < 0xb9 (confirmed to fix the issue by users suffering from SKL150), and for Kabylake, disable hyperthreading when microcode < 0x5d (personal best guess based on microcode release date -- someone @intel might want to confirm it). -- Henrique Holschuh