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From: Chen-Yu Tsai <wens@csie.org>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Cc: Chen-Yu Tsai <wens@csie.org>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Icenowy Zheng <icenowy@aosc.io>
Subject: [PATCH 04/10] irqchip: sunxi-nmi: const-ify sunxi_sc_nmi_reg_offs structures
Date: Tue,  6 Jun 2017 13:59:26 +0800	[thread overview]
Message-ID: <20170606055932.22548-5-wens@csie.org> (raw)
In-Reply-To: <20170606055932.22548-1-wens@csie.org>

The sunxi_sc_nmi_reg_offs, which hold the register offsets for the
various variants, is never modified, and only used at init time within
the init functions referenced by IRQCHIP_DECLARE, which themselves are
tagged __init.

Const-ify the sunxi_sc_nmi_reg_offs structures, and tag them as
__initconst.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 drivers/irqchip/irq-sunxi-nmi.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-sunxi-nmi.c b/drivers/irqchip/irq-sunxi-nmi.c
index 76f2431b6b7b..e713ec66322b 100644
--- a/drivers/irqchip/irq-sunxi-nmi.c
+++ b/drivers/irqchip/irq-sunxi-nmi.c
@@ -52,19 +52,19 @@ struct sunxi_sc_nmi_reg_offs {
 	u32 enable;
 };
 
-static struct sunxi_sc_nmi_reg_offs sun6i_reg_offs = {
+static const struct sunxi_sc_nmi_reg_offs sun6i_reg_offs __initconst = {
 	.ctrl	= SUN6I_NMI_CTRL,
 	.pend	= SUN6I_NMI_PENDING,
 	.enable	= SUN6I_NMI_ENABLE,
 };
 
-static struct sunxi_sc_nmi_reg_offs sun7i_reg_offs = {
+static const struct sunxi_sc_nmi_reg_offs sun7i_reg_offs __initconst = {
 	.ctrl	= SUN7I_NMI_CTRL,
 	.pend	= SUN7I_NMI_PENDING,
 	.enable	= SUN7I_NMI_ENABLE,
 };
 
-static struct sunxi_sc_nmi_reg_offs sun9i_reg_offs = {
+static const struct sunxi_sc_nmi_reg_offs sun9i_reg_offs __initconst = {
 	.ctrl	= SUN9I_NMI_CTRL,
 	.pend	= SUN9I_NMI_PENDING,
 	.enable	= SUN9I_NMI_ENABLE,
@@ -142,7 +142,7 @@ static int sunxi_sc_nmi_set_type(struct irq_data *data, unsigned int flow_type)
 }
 
 static int __init sunxi_sc_nmi_irq_init(struct device_node *node,
-					struct sunxi_sc_nmi_reg_offs *reg_offs)
+					const struct sunxi_sc_nmi_reg_offs *reg_offs)
 {
 	struct irq_domain *domain;
 	struct irq_chip_generic *gc;
-- 
2.11.0

  parent reply	other threads:[~2017-06-06  5:59 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-06  5:59 [PATCH 00/10] irqchip: sunxi-nmi: Cleanups and fix A31 R_INTC register offset Chen-Yu Tsai
2017-06-06  5:59 ` [PATCH 01/10] irqchip: sunxi-nmi: Convert magic numbers to defines Chen-Yu Tsai
2017-06-06  5:59 ` [PATCH 02/10] irqchip: sunxi-nmi: Document interrupt disabling and clearing at probe time Chen-Yu Tsai
2017-06-06  5:59 ` [PATCH 03/10] irqchip: sunxi-nmi: Reorder sunxi_sc_nmi_reg_offs' in ascending order Chen-Yu Tsai
2017-06-06  5:59 ` Chen-Yu Tsai [this message]
2017-06-06  5:59 ` [PATCH 05/10] dt-bindings: interrupt-controller: sunxi-nmi: Add compatible for A31 R_INTC Chen-Yu Tsai
2017-06-09 13:25   ` Rob Herring
2017-06-06  5:59 ` [PATCH 06/10] irqchip: sunxi-nmi: Support sun6i-a31-r-intc compatible Chen-Yu Tsai
2017-06-06  5:59 ` [PATCH 07/10] ARM: sun6i: a31: Use new sun6i-a31-r-intc compatible for NMI/R_INTC Chen-Yu Tsai
2017-06-06  5:59 ` [PATCH 08/10] ARM: sun8i: a23/a33: " Chen-Yu Tsai
2017-06-06  5:59 ` [PATCH 09/10] ARM: sun8i: a83t: Add device node for R_INTC interrupt controller Chen-Yu Tsai
2017-06-06  5:59 ` [PATCH 10/10] arm64: allwinner: a64: add NMI (R_INTC) controller on A64 Chen-Yu Tsai
2017-06-06 15:32 ` [PATCH 00/10] irqchip: sunxi-nmi: Cleanups and fix A31 R_INTC register offset Marc Zyngier
2017-06-06 15:32   ` Icenowy Zheng
2017-06-06 18:47 ` Maxime Ripard
2017-07-05  7:22   ` Chen-Yu Tsai

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