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From: Borislav Petkov <bp@alien8.de>
To: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
Cc: linux-kernel@vger.kernel.org,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: Re: [Patch v2 2/2] amd: uncore: Get correct number of cores sharing last level cache
Date: Sun, 11 Jun 2017 19:51:06 +0200	[thread overview]
Message-ID: <20170611175106.zeldukujqmxe2gt2@pd.tnic> (raw)
In-Reply-To: <358964e78b06c24422da14a1311119eb8ae06580.1496950330.git.Janakarajan.Natarajan@amd.com>

On Thu, Jun 08, 2017 at 02:48:24PM -0500, Janakarajan Natarajan wrote:
> In Family 17h, the number of cores sharing a cache level is obtained
> from the Cache Properties CPUID leaf (0x8000001d) by passing in the
> cache level in ECX. In prior families, a cache level of 2 was used to
> determine this information.
> 
> To get the right information, irrespective of Family, iterate over
> the cache levels using CPUID 0x8000001d. The last level cache is the
> last value to return a non-zero value in EAX.
> 
> Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com>
> ---
>  arch/x86/events/amd/uncore.c | 17 ++++++++++++++---
>  1 file changed, 14 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c
> index e34f8a6..6952262 100644
> --- a/arch/x86/events/amd/uncore.c
> +++ b/arch/x86/events/amd/uncore.c
> @@ -400,11 +400,22 @@ static int amd_uncore_cpu_starting(unsigned int cpu)
>  
>  	if (amd_uncore_llc) {
>  		unsigned int apicid = cpu_data(cpu).apicid;
> -		unsigned int nshared;
> +		unsigned int nshared, cache_topology, prev_eax = 0;

cache_topology is too long and not really what it is. Simply call it
subleaf.

>  		uncore = *per_cpu_ptr(amd_uncore_llc, cpu);
> -		cpuid_count(0x8000001d, 2, &eax, &ebx, &ecx, &edx);
> -		nshared = ((eax >> 14) & 0xfff) + 1;

<---- newline here.

> +		/*
> +		 * Iterate over Cache Topology Definition leaves until no
> +		 * more cache descriptions are available
							^
							|
All sentences need to end with a fullstop.--------------+

> +		 */
> +		for(cache_topology = 0; cache_topology < 5; cache_topology++) {
> +			cpuid_count(0x8000001d, cache_topology, &eax, &ebx, &ecx, &edx);
> +
> +			if ((eax & 0x1f) == 0) /* EAX[0:4] gives type of cache */

No side comments, put it over the if-line.

Also, we generally do 0-tests this way:

			if (!(eax & 0x1f))

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

      reply	other threads:[~2017-06-11 17:51 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-08 19:48 [Patch v2 0/2] amd: uncore: Fix for AMD Uncore driver Janakarajan Natarajan
2017-06-08 19:48 ` [Patch v2 1/2] amd: uncore: Rename cpufeatures macro for cache counters Janakarajan Natarajan
2017-06-11 17:29   ` Borislav Petkov
2017-06-08 19:48 ` [Patch v2 2/2] amd: uncore: Get correct number of cores sharing last level cache Janakarajan Natarajan
2017-06-11 17:51   ` Borislav Petkov [this message]

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