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From: Marc Zyngier <marc.zyngier@arm.com>
To: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu
Cc: Christoffer Dall <christoffer.dall@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Eric Auger <eric.auger@redhat.com>,
	Shanker Donthineni <shankerd@codeaurora.org>,
	Mark Rutland <mark.rutland@arm.com>
Subject: [PATCH v2 27/52] irqchip/gic-v3-its: Support VPE doorbell invalidation even when !DirectLPI
Date: Wed, 28 Jun 2017 16:03:46 +0100	[thread overview]
Message-ID: <20170628150411.15846-28-marc.zyngier@arm.com> (raw)
In-Reply-To: <20170628150411.15846-1-marc.zyngier@arm.com>

When we don't have the DirectLPI feature, we must work around the
architecture shortcomings to be able to perform the required
invalidation.

For this, we create a fake device whose sole purpose is to
provide a way to issue a map/inv/unmap sequence (and the corresponding
sync operations). That's 6 commands and a full serialization point
to be able to do this.

You just have to hope the hypervisor won't do that too often...

Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
 drivers/irqchip/irq-gic-v3-its.c | 66 ++++++++++++++++++++++++++++++++++++++--
 1 file changed, 63 insertions(+), 3 deletions(-)

diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 64893f0427f2..4979916cd3d7 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -138,6 +138,9 @@ struct its_device {
 	u32			device_id;
 };
 
+static struct its_device *vpe_proxy_dev;
+static DEFINE_RAW_SPINLOCK(vpe_proxy_dev_lock);
+
 static LIST_HEAD(its_nodes);
 static DEFINE_SPINLOCK(its_lock);
 static struct rdists *gic_rdists;
@@ -2074,6 +2077,14 @@ static int its_msi_prepare(struct irq_domain *domain, struct device *dev,
 	msi_info = msi_get_domain_info(domain);
 	its = msi_info->data;
 
+	if (its->is_v4 && !gic_rdists->has_direct_lpi &&
+	    dev_id == vpe_proxy_dev->device_id) {
+		/* Bad luck. Get yourself a better implementation */
+		WARN_ONCE(1, "DevId %x clashes with GICv4 VPE proxy device\n",
+			  dev_id);
+		return -EINVAL;
+	}
+
 	its_dev = its_find_device(its, dev_id);
 	if (its_dev) {
 		/*
@@ -2318,10 +2329,38 @@ static int its_vpe_set_vcpu_affinity(struct irq_data *d, void *vcpu_info)
 static void its_vpe_send_inv(struct irq_data *d)
 {
 	struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
-	void __iomem *rdbase;
 
-	rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base;
-	gic_write_invlpir(d->hwirq, rdbase + GICR_INVLPIR);
+	if (gic_rdists->has_direct_lpi) {
+		void __iomem *rdbase;
+
+		rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base;
+		gic_write_invlpir(d->hwirq, rdbase + GICR_INVLPIR);
+	} else {
+		/*
+		 * This is insane.
+		 *
+		 * If a GICv4 doesn't implement Direct LPIs, the only
+		 * way to perform an invalidate is to use a fake
+		 * device to issue a MAP/INV/UNMAP sequence. Since
+		 * each of these commands has a sync operation, this
+		 * is really fast. Not.
+		 *
+		 * We always use event 0, and thus serialize all VPE
+		 * invalidations in the system.
+		 *
+		 * Broken by design(tm).
+		 */
+		unsigned long flags;
+
+		raw_spin_lock_irqsave(&vpe_proxy_dev_lock, flags);
+
+		vpe_proxy_dev->event_map.col_map[0] = vpe->col_idx;
+		its_send_mapti(vpe_proxy_dev, vpe->vpe_db_lpi, 0);
+		its_send_inv(vpe_proxy_dev, 0);
+		its_send_discard(vpe_proxy_dev, 0);
+
+		raw_spin_unlock_irqrestore(&vpe_proxy_dev_lock, flags);
+	}
 }
 
 static void its_vpe_mask_irq(struct irq_data *d)
@@ -2616,6 +2655,27 @@ static int its_init_domain(struct fwnode_handle *handle, struct its_node *its)
 
 static int its_init_vpe_domain(void)
 {
+	struct its_node *its;
+	u32 devid;
+
+	if (gic_rdists->has_direct_lpi) {
+		pr_info("ITS: Using DirectLPI for VPE invalidation\n");
+		return 0;
+	}
+
+	/* Any ITS will do, even if not v4 */
+	its = list_first_entry(&its_nodes, struct its_node, entry);
+
+	/* Use the last possible DevID */
+	devid = GENMASK(its->device_ids - 1, 0);
+	vpe_proxy_dev = its_create_device(its, devid, 1);
+	if (!vpe_proxy_dev) {
+		pr_err("ITS: Can't allocate GICv4 proxy device\n");
+		return -ENODEV;
+	}
+
+	pr_info("ITS: Allocated DevID %x as GICv4 proxy device\n", devid);
+
 	return 0;
 }
 
-- 
2.11.0

  parent reply	other threads:[~2017-06-28 15:06 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-28 15:03 [PATCH v2 00/52] irqchip: KVM: Add support for GICv4 Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 01/52] genirq: Let irq_set_vcpu_affinity() iterate over hierarchy Marc Zyngier
2017-07-04 21:15   ` Thomas Gleixner
2017-06-28 15:03 ` [PATCH v2 02/52] irqchip/gic-v3: Add redistributor iterator Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 03/52] irqchip/gic-v3: Add VLPI/DirectLPI discovery Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 04/52] irqchip/gic-v3-its: Move LPI definitions around Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 05/52] irqchip/gic-v3-its: Add probing for VLPI properties Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 06/52] irqchip/gic-v3-its: Macro-ize its_send_single_command Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 07/52] irqchip/gic-v3-its: Implement irq_set_irqchip_state for pending state Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 08/52] irqchip/gic-v3-its: Split out property table allocation Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 09/52] irqchip/gic-v3-its: Allow use of indirect VCPU tables Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 10/52] irqchip/gic-v3-its: Split out pending table allocation Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 11/52] irqchip/gic-v3-its: Rework LPI freeing Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 12/52] irqchip/gic-v3-its: Generalize device table allocation Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 13/52] irqchip/gic-v3-its: Generalize LPI configuration Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 14/52] irqchip/gic-v4: Add management structure definitions Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 15/52] irqchip/gic-v3-its: Add GICv4 ITS command definitions Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 16/52] irqchip/gic-v3-its: Add VLPI configuration hook Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 17/52] irqchip/gic-v3-its: Add VLPI map/unmap operations Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 18/52] irqchip/gic-v3-its: Add VLPI configuration handling Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 19/52] irqchip/gic-v3-its: Add VPE domain infrastructure Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 20/52] irqchip/gic-v3-its: Add VPE irq domain allocation/teardown Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 21/52] irqchip/gic-v3-its: Add VPE irq domain [de]activation Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 22/52] irqchip/gic-v3-its: Add VPENDBASER/VPROPBASER accessors Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 23/52] irqchip/gic-v3-its: Add VPE scheduling Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 24/52] irqchip/gic-v3-its: Add VPE invalidation hook Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 25/52] irqchip/gic-v3-its: Add VPE affinity changes Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 26/52] irqchip/gic-v3-its: Add VPE interrupt masking Marc Zyngier
2017-06-28 15:03 ` Marc Zyngier [this message]
2017-06-28 15:03 ` [PATCH v2 28/52] irqchip/gic-v3-its: Set implementation defined bit to enable VLPIs Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 29/52] irqchip/gic-v4: Add per-VM VPE domain creation Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 30/52] irqchip/gic-v4: Add VPE command interface Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 31/52] irqchip/gic-v4: Add VLPI configuration interface Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 32/52] irqchip/gic-v4: Add some basic documentation Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 33/52] irqchip/gic-v4: Enable low-level GICv4 operations Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 34/52] irqchip/gic-v3: Advertise GICv4 support to KVM Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 35/52] KVM: arm/arm64: vgic: Move kvm_vgic_destroy call around Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 36/52] KVM: arm/arm64: vITS: Add MSI translation helpers Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 37/52] KVM: arm/arm64: GICv4: Add init and teardown of the vPE irq domain Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 38/52] KVM: arm/arm64: GICv4: Wire init/teardown of per-VM support Marc Zyngier
2017-07-08 11:26   ` Shanker Donthineni
2017-07-10 16:34     ` Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 39/52] KVM: arm/arm64: GICv4: Wire mapping/unmapping of VLPIs in VFIO irq bypass Marc Zyngier
2017-06-28 15:03 ` [PATCH v2 40/52] KVM: arm/arm64: GICv4: Handle INT command applied to a VLPI Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 41/52] KVM: arm/arm64: GICv4: Unmap VLPI when freeing an LPI Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 42/52] KVM: arm/arm64: GICv4: Handle MOVI applied to a VLPI Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 43/52] KVM: arm/arm64: GICv4: Handle CLEAR " Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 44/52] KVM: arm/arm64: GICv4: Handle MOVALL applied to a vPE Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 45/52] KVM: arm/arm64: GICv4: Propagate property updates to VLPIs Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 46/52] KVM: arm/arm64: GICv4: Handle INVALL applied to a vPE Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 47/52] KVM: arm/arm64: GICv4: Propagate VLPI properties at map time Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 48/52] KVM: arm/arm64: GICv4: Add doorbell interrupt handling Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 49/52] KVM: arm/arm64: GICv4: Hook vPE scheduling into vgic flush/sync Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 50/52] KVM: arm/arm64: GICv4: Enable virtual cpuif if VLPIs can be delivered Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 51/52] KVM: arm/arm64: GICv4: Use pending_last as a scheduling hint Marc Zyngier
2017-06-28 15:04 ` [PATCH v2 52/52] KVM: arm/arm64: GICv4: Enable VLPI support Marc Zyngier
2017-07-01 14:54 ` [PATCH v2 00/52] irqchip: KVM: Add support for GICv4 Shanker Donthineni

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