From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750950AbdGYFQV (ORCPT ); Tue, 25 Jul 2017 01:16:21 -0400 Received: from mirror2.csie.ntu.edu.tw ([140.112.30.76]:32998 "EHLO wens.csie.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750780AbdGYFQR (ORCPT ); Tue, 25 Jul 2017 01:16:17 -0400 From: Chen-Yu Tsai To: Maxime Ripard , Russell King Cc: linux-sunxi@googlegroups.com, Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Nicolas Pitre , Dave Martin Subject: [PATCH 3/4] ARM: dts: sun9i: Add CPUCFG device node for A80 dtsi Date: Tue, 25 Jul 2017 13:09:18 +0800 Message-Id: <20170725050919.16036-4-wens@csie.org> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170725050919.16036-1-wens@csie.org> References: <20170725050919.16036-1-wens@csie.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org CPUCFG is a collection of registers that are mapped to the SoC's signals from each individual processor core and associated peripherals, such as resets for processors, L1/L2 cache and other things. These registers are used for SMP bringup and CPU hotplugging. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun9i-a80.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index fc179b8ab038..cc5db467f616 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -368,6 +368,11 @@ #reset-cells = <1>; }; + cpucfg@01700000 { + compatible = "allwinner,sun9i-a80-cpucfg"; + reg = <0x01700000 0x100>; + }; + mmc0: mmc@01c0f000 { compatible = "allwinner,sun9i-a80-mmc"; reg = <0x01c0f000 0x1000>; -- 2.13.3