From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752353AbdHOLfV (ORCPT ); Tue, 15 Aug 2017 07:35:21 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:50582 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752318AbdHOLfS (ORCPT ); Tue, 15 Aug 2017 07:35:18 -0400 From: Marc Zyngier To: linux-kernel@vger.kernel.org Cc: Wei Xu , James Hogan , Thomas Gleixner , Jason Cooper , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Kevin Cernekee , Florian Fainelli , Chris Zankel , Max Filippov , Paul Burton , Matt Redfearn Subject: [PATCH 05/12] irqchip/gic-v3-its: Report that effective affinity is a single target Date: Tue, 15 Aug 2017 12:34:40 +0100 Message-Id: <20170815113447.14507-6-marc.zyngier@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170815113447.14507-1-marc.zyngier@arm.com> References: <20170815113447.14507-1-marc.zyngier@arm.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The GICv3 ITS driver only targets a single CPU at a time, even if the notional affinity is wider. Let's inform the core code about this. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v3-its.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 68932873eebc..22e228500357 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -649,6 +649,7 @@ static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, target_col = &its_dev->its->collections[cpu]; its_send_movi(its_dev, target_col, id); its_dev->event_map.col_map[id] = cpu; + irq_data_update_effective_affinity(d, cpumask_of(cpu)); } return IRQ_SET_MASK_OK_DONE; @@ -1481,6 +1482,7 @@ static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq, &its_irq_chip, its_dev); + irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq + i))); pr_debug("ID:%d pID:%d vID:%d\n", (int)(hwirq - its_dev->event_map.lpi_base), (int) hwirq, virq + i); @@ -1495,13 +1497,16 @@ static void its_irq_domain_activate(struct irq_domain *domain, struct its_device *its_dev = irq_data_get_irq_chip_data(d); u32 event = its_get_event_id(d); const struct cpumask *cpu_mask = cpu_online_mask; + int cpu; /* get the cpu_mask of local node */ if (its_dev->its->numa_node >= 0) cpu_mask = cpumask_of_node(its_dev->its->numa_node); /* Bind the LPI to the first possible CPU */ - its_dev->event_map.col_map[event] = cpumask_first(cpu_mask); + cpu = cpumask_first(cpu_mask); + its_dev->event_map.col_map[event] = cpu; + irq_data_update_effective_affinity(d, cpumask_of(cpu)); /* Map the GIC IRQ and event to the device */ its_send_mapti(its_dev, d->hwirq, event); -- 2.11.0