From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753540AbdHPAkL (ORCPT ); Tue, 15 Aug 2017 20:40:11 -0400 Received: from mx2.suse.de ([195.135.220.15]:45382 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753409AbdHPAjF (ORCPT ); Tue, 15 Aug 2017 20:39:05 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: Philipp Zabel , linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Roc He , =?UTF-8?q?=E8=92=8B=E4=B8=BD=E7=90=B4?= , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org Subject: [PATCH 4/5] arm64: dts: realtek: Add RTD1295 UART resets Date: Wed, 16 Aug 2017 02:38:46 +0200 Message-Id: <20170816003847.6208-5-afaerber@suse.de> X-Mailer: git-send-email 2.12.3 In-Reply-To: <20170816003847.6208-1-afaerber@suse.de> References: <20170816003847.6208-1-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Associate the UART nodes with the corresponding reset controller bits. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/realtek/rtd1295.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi index 9f1dcd1fa8b3..e777200d84b9 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi @@ -123,6 +123,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <27000000>; + resets = <&iso_reset 8>; status = "disabled"; }; @@ -132,6 +133,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; + resets = <&reset2 28>; status = "disabled"; }; @@ -141,6 +143,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; + resets = <&reset2 27>; status = "disabled"; }; -- 2.12.3