From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752272AbdHQKN3 (ORCPT ); Thu, 17 Aug 2017 06:13:29 -0400 Received: from mx2.suse.de ([195.135.220.15]:42658 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752322AbdHQKLt (ORCPT ); Thu, 17 Aug 2017 06:11:49 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: Thomas Gleixner , Jason Cooper , Marc Zyngier , linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Roc He , =?UTF-8?q?=E8=92=8B=E4=B8=BD=E7=90=B4?= , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org Subject: [RFC 2/3] arm64: dts: realtek: Add irq mux to RTD1295 Date: Thu, 17 Aug 2017 12:11:39 +0200 Message-Id: <20170817101140.32000-3-afaerber@suse.de> X-Mailer: git-send-email 2.12.3 In-Reply-To: <20170817101140.32000-1-afaerber@suse.de> References: <20170817101140.32000-1-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Update UART nodes with interrupts. Signed-off-by: Andreas Färber --- arch/arm64/boot/dts/realtek/rtd1295.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi index 2d2d84b573e3..77063e984db9 100644 --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi @@ -112,6 +112,14 @@ #reset-cells = <1>; }; + iso_irq_mux: interrupt-controller@98007000 { + compatible = "realtek,rtd1295-iso-irq-mux"; + reg = <0x98007000 0x100>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + iso_reset: reset-controller@98007088 { compatible = "realtek,rtd1295-reset"; reg = <0x98007088 0x4>; @@ -124,16 +132,28 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <27000000>; + interrupt-parent = <&iso_irq_mux>; + interrupts = <2>; resets = <&iso_reset RTD1295_ISO_RSTN_UR0>; status = "disabled"; }; + irq_mux: interrupt-controller@9801b000 { + compatible = "realtek,rtd1295-irq-mux"; + reg = <0x9801b000 0x100>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + uart1: serial@9801b200 { compatible = "snps,dw-apb-uart"; reg = <0x9801b200 0x100>; reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; + interrupt-parent = <&irq_mux>; + interrupts = <3>, <5>; resets = <&reset2 RTD1295_RSTN_UR1>; status = "disabled"; }; @@ -144,6 +164,8 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; + interrupt-parent = <&irq_mux>; + interrupts = <8>, <13>; resets = <&reset2 RTD1295_RSTN_UR2>; status = "disabled"; }; -- 2.12.3