From: Rob Herring <robh@kernel.org>
To: Mikko Perttunen <mperttunen@nvidia.com>
Cc: thierry.reding@gmail.com, jonathanh@nvidia.com,
mark.rutland@arm.com, devicetree@vger.kernel.org,
dnibade@nvidia.com, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org, amerilainen@nvidia.com,
linux-tegra@vger.kernel.org, sgurrappadi@nvidia.com,
digetx@gmail.com, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 4/6] dt-bindings: host1x: Fix and add Tegra186 information
Date: Mon, 21 Aug 2017 21:39:23 -0500 [thread overview]
Message-ID: <20170822023923.nr22ujsuiousvt2y@rob-hp-laptop> (raw)
In-Reply-To: <20170817185413.6324-5-mperttunen@nvidia.com>
On Thu, Aug 17, 2017 at 09:54:11PM +0300, Mikko Perttunen wrote:
> Add note that address/size-cells should be 2 on 64-bit systems,
> and add Tegra186-specific register range properties.
Generally the cell sizes have nothing to do with the addressing size of
the cpu. They should be as small as what fits for the given sub-tree. If
all the register space fits into 4GB, then there's no reason for the
#size-cells to be 2. The same is true if the sub-tree has a parent bus.
Rob
next prev parent reply other threads:[~2017-08-22 2:39 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-17 18:54 [PATCH 0/6] Host1x and VIC support for Tegra186 Mikko Perttunen
2017-08-17 18:54 ` [PATCH 1/6] arm64: tegra: Add #power-domain-cells for BPMP Mikko Perttunen
2017-08-17 18:54 ` [PATCH 2/6] arm64: tegra: Add host1x on Tegra186 Mikko Perttunen
2017-08-17 18:54 ` [PATCH 3/6] arm64: tegra: Add VIC " Mikko Perttunen
2017-08-17 18:54 ` [PATCH 4/6] dt-bindings: host1x: Fix and add Tegra186 information Mikko Perttunen
2017-08-22 2:39 ` Rob Herring [this message]
2017-08-17 18:54 ` [PATCH 5/6] gpu: host1x: Add Tegra186 support Mikko Perttunen
2017-08-17 22:09 ` Dmitry Osipenko
2017-08-17 18:54 ` [PATCH 6/6] drm/tegra: Add Tegra186 support for VIC Mikko Perttunen
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