From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751995AbdIAMfP (ORCPT ); Fri, 1 Sep 2017 08:35:15 -0400 Received: from 123-192-241-227.dynamic.kbronet.com.tw ([123.192.241.227]:45594 "EHLO E6440" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751778AbdIAMfN (ORCPT ); Fri, 1 Sep 2017 08:35:13 -0400 X-Greylist: delayed 5045 seconds by postgrey-1.27 at vger.kernel.org; Fri, 01 Sep 2017 08:35:13 EDT From: Harry Pan To: LKML Cc: gs0622@gmail.com, Harry Pan , tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, peterz@infradead.org, davidcc@google.com, bp@suse.de, lukasz.odzioba@intel.com, piotr.luc@intel.com, srinivas.pandruvada@linux.intel.com Subject: [PATCH] perf/x86/intel/cstate: revise package C-state residency of SKL/KBL Date: Fri, 1 Sep 2017 17:39:08 +0800 Message-Id: <20170901093908.11123-1-harry.pan@intel.com> X-Mailer: git-send-email 2.12.2 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Despite Intel SDM vol-4 does not claim to have there MSRs, EDS of SKL/KBL do claim to have PC8/PC9/PC10 states, also these residency MSRs are visible through rdmsr. This patch allows developers to calculate correct portions among various package C-states against total TSC ticks, and this would also align the events w/ Len Brown's turbostat metrics on SKL/KBL platforms. Signed-off-by: Harry Pan --- arch/x86/events/intel/cstate.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c index 4cf100ff2a37..8f339635d22b 100644 --- a/arch/x86/events/intel/cstate.c +++ b/arch/x86/events/intel/cstate.c @@ -75,15 +75,15 @@ * Scope: Package (physical package) * MSR_PKG_C8_RESIDENCY: Package C8 Residency Counter. * perf code: 0x04 - * Available model: HSW ULT only + * Available model: HSW ULT,SKL,KBL * Scope: Package (physical package) * MSR_PKG_C9_RESIDENCY: Package C9 Residency Counter. * perf code: 0x05 - * Available model: HSW ULT only + * Available model: HSW ULT,SKL,KBL * Scope: Package (physical package) * MSR_PKG_C10_RESIDENCY: Package C10 Residency Counter. * perf code: 0x06 - * Available model: HSW ULT, GLM + * Available model: HSW ULT,GLM,SKL,KBL * Scope: Package (physical package) * */ @@ -550,11 +550,11 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = { X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_GT3E, snb_cstates), X86_CSTATES_MODEL(INTEL_FAM6_BROADWELL_X, snb_cstates), - X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_MOBILE, snb_cstates), - X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_DESKTOP, snb_cstates), + X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_MOBILE, hswult_cstates), + X86_CSTATES_MODEL(INTEL_FAM6_SKYLAKE_DESKTOP, hswult_cstates), - X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_MOBILE, snb_cstates), - X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_DESKTOP, snb_cstates), + X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_MOBILE, hswult_cstates), + X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_DESKTOP, hswult_cstates), X86_CSTATES_MODEL(INTEL_FAM6_XEON_PHI_KNL, knl_cstates), X86_CSTATES_MODEL(INTEL_FAM6_XEON_PHI_KNM, knl_cstates), -- 2.12.2