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From: kan.liang@intel.com
To: tglx@linutronix.de, peterz@infradead.org, mingo@redhat.com,
	linux-kernel@vger.kernel.org
Cc: harry.pan@intel.com, srinivas.pandruvada@linux.intel.com,
	piotr.luc@intel.com, ak@linux.intel.com,
	Kan Liang <Kan.liang@intel.com>
Subject: [PATCH 2/3] perf/x86/msr: add missing CPU IDs
Date: Fri,  8 Sep 2017 17:34:48 -0400	[thread overview]
Message-ID: <20170908213449.6224-2-kan.liang@intel.com> (raw)
In-Reply-To: <20170908213449.6224-1-kan.liang@intel.com>

From: Kan Liang <Kan.liang@intel.com>

Goldmont, Glodmont plus and Xeon Phi have MSR_SMI_COUNT as well.

Signed-off-by: Kan Liang <Kan.liang@intel.com>
---
 arch/x86/events/msr.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index 4bb3ec6..0672367 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -63,6 +63,14 @@ static bool test_intel(int idx)
 	case INTEL_FAM6_ATOM_SILVERMONT1:
 	case INTEL_FAM6_ATOM_SILVERMONT2:
 	case INTEL_FAM6_ATOM_AIRMONT:
+
+	case INTEL_FAM6_ATOM_GOLDMONT:
+	case INTEL_FAM6_ATOM_DENVERTON:
+
+	case INTEL_FAM6_ATOM_GEMINI_LAKE:
+
+	case INTEL_FAM6_XEON_PHI_KNL:
+	case INTEL_FAM6_XEON_PHI_KNM:
 		if (idx == PERF_MSR_SMI)
 			return true;
 		break;
-- 
2.9.4

  reply	other threads:[~2017-09-08 21:35 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-08 21:34 [PATCH 1/3] perf/x86/intel/cstate: " kan.liang
2017-09-08 21:34 ` kan.liang [this message]
2017-09-25 10:09   ` [tip:x86/urgent] perf/x86/msr: Add " tip-bot for Kan Liang
2017-09-08 21:34 ` [PATCH 3/3] perf/x86/intel/rapl: add " kan.liang
2017-09-25 10:09   ` [tip:x86/urgent] perf/x86/intel/rapl: Add " tip-bot for Kan Liang
2017-09-25 10:08 ` [tip:x86/urgent] perf/x86/intel/cstate: " tip-bot for Kan Liang

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