Re: Current mainline git (24e700e291d52bd2) hangs when building e.g. perf

[Borislav Petkov <bp@alien8.de>]

On Sat, Sep 09, 2017 at 12:28:30PM -0700, Andy Lutomirski wrote:
> I propose the following fix.  If PCID is on, then, in
> enter_lazy_tlb(), we switch to init_mm with the no-flush flag set.
> (And we give init_mm its own dedicated ASID to keep it simple and fast
> -- no need to use the LRU ASID mapping to assign one dynamically.)  We
> clear the bit in mm_cpumask.  That is, we more or less just skip the
> whole lazy TLB optimization and rely on PCID CPUs having reasonably
> fast CR3 writes.  No extra IPIs.  I suppose I need to benchmark this.
> It will certainly slow down workloads that rapidly toggle between a
> user thread and a kernel thread because it forces serialization on
> each mm switch, but maybe that's not so bad.

Sounds ok so far.

> If PCID is off, then we leave the old CR3 value when we go lazy, and
> we also leave the flag in mm_cpumask set.  When a flush is requested,
> we send out the IPI and switch to init_mm (and flush because we have
> no choice).  IOW, the no-PCID behavior goes back to what it used to
> be.

Ok, question: why can't we load the new CR3 value too, immediately? Or
are we saying, we might get to return to the same CR3 we had before we
were lazy so we won't need to do an unnecessary CR3 write with the same
value. A microoptimization, if you will.

Yes?

-- 
Regards/Gruss,
    Boris.

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