From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753296AbdIURPE (ORCPT ); Thu, 21 Sep 2017 13:15:04 -0400 Received: from mail-wm0-f42.google.com ([74.125.82.42]:48993 "EHLO mail-wm0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752751AbdIURO6 (ORCPT ); Thu, 21 Sep 2017 13:14:58 -0400 X-Google-Smtp-Source: AOwi7QDgdKZec3ixiRshwQFjTTfzqclTNp2RR04rE32QT7sCEZ8zpdGvm7bOs46EXPrRw8aawEGSWA== From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 1/7] ARM: dts: meson8: remove gpio offset Date: Thu, 21 Sep 2017 19:14:44 +0200 Message-Id: <20170921171450.27407-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170921171450.27407-1-jbrunet@baylibre.com> References: <20170921171450.27407-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove pin offset on the AO controller. meson pinctrl no longer has this quirk Tested-by: Martin Blumenstingl Signed-off-by: Jerome Brunet --- arch/arm/boot/dts/meson8.dtsi | 2 +- arch/arm/boot/dts/meson8b.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index b98d44fde6b6..aff0243ea7d5 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -132,7 +132,7 @@ reg-names = "mux", "pull", "gpio"; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&pinctrl_aobus 0 120 16>; + gpio-ranges = <&pinctrl_aobus 0 0 16>; }; uart_ao_a_pins: uart_ao_a { diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index bc278da7df0d..09ceec93b4c8 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -104,7 +104,7 @@ reg-names = "mux", "pull", "gpio"; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&pinctrl_aobus 0 130 16>; + gpio-ranges = <&pinctrl_aobus 0 0 16>; }; uart_ao_a_pins: uart_ao_a { -- 2.13.5