From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751896AbdIUUWV (ORCPT ); Thu, 21 Sep 2017 16:22:21 -0400 Received: from relay2.sgi.com ([192.48.180.65]:43328 "EHLO relay.sgi.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751791AbdIUUWU (ORCPT ); Thu, 21 Sep 2017 16:22:20 -0400 Message-Id: <20170921201221.869441567@stormcage.americas.sgi.com> User-Agent: quilt/0.46-1 Date: Thu, 21 Sep 2017 15:12:21 -0500 From: To: Ingo Molnar , "H. Peter Anvin" , Thomas Gleixner Cc: Peter Zijlstra , Bin Gao , Prarit Bhargava , Dimitri Sivanich , Andrew Banman , Russ Anderson , linux-kernel@vger.kernel.org, x86@kernel.org Subject: [PATCH 0/3] x86/platform/UV: Update TSC support Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The UV BIOS goes to considerable effort to get the TSC synchronization accurate across the entire system. Included in that are multiple chassis that can have 32+ sockets. The architecture also supports an external high resolution clock to help all the chassis and CPU's in maintaining this synchronization. As a result the UV system BIOS provides much better TSC accuracy than the current kernel TSC ADJUST functions. This is extremely important in applications that, for example, store and access data bases. These two patches disable an assumption made by the kernel TSC ADJUST functions that are not applicable to the UV system (and maybe others?). That being that Socket 0 in the system should have a TSC ADJUST value of zero. This is incorrect when all the chassis are started asynchronously to each other, therefore which TSC's are farther advanced is not predictable. The UV BIOS deals with this scenario correctly. --