From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752481AbdJDPCh (ORCPT ); Wed, 4 Oct 2017 11:02:37 -0400 Received: from mail.kernel.org ([198.145.29.99]:60010 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752322AbdJDPCf (ORCPT ); Wed, 4 Oct 2017 11:02:35 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 68F6E21883 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=goodmis.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=rostedt@goodmis.org Date: Wed, 4 Oct 2017 11:02:32 -0400 From: Steven Rostedt To: Peter Zijlstra Cc: "Paul E. McKenney" , pmladek@suse.com, sergey.senozhatsky@gmail.com, linux-kernel@vger.kernel.org, mingo@kernel.org, tglx@linutronix.de Subject: Re: [PATCH 3/3] early_printk: Add simple serialization to early_vprintk() Message-ID: <20171004110232.24579659@gandalf.local.home> In-Reply-To: <20171004145247.4tp6r6ds6e5pkut5@hirez.programming.kicks-ass.net> References: <20170928121823.430053219@infradead.org> <20170928122513.431444176@infradead.org> <20171003182422.025d0a67@gandalf.local.home> <20171004090830.p5kwzu6ex2wimh4v@hirez.programming.kicks-ass.net> <20171004090401.3a5123a6@gandalf.local.home> <20171004141745.GH3521@linux.vnet.ibm.com> <20171004104354.2ecb23e9@gandalf.local.home> <20171004145247.4tp6r6ds6e5pkut5@hirez.programming.kicks-ass.net> X-Mailer: Claws Mail 3.14.0 (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 4 Oct 2017 16:52:47 +0200 Peter Zijlstra wrote: > On Wed, Oct 04, 2017 at 10:43:54AM -0400, Steven Rostedt wrote: > > > > My question is not about ordering, but about coherency. Can you have > > one CPU read a variable that goes into cache, and keep using the cached > > variable every time the program asks to read it, instead of going out > > to memory. > > No, not on a coherent system. In this case. Reviewed-by: Steven Rostedt (VMware) -- Steve