From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751335AbdJECdb (ORCPT ); Wed, 4 Oct 2017 22:33:31 -0400 Received: from anglina.eu ([195.181.215.36]:49230 "EHLO megous.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751234AbdJECda (ORCPT ); Wed, 4 Oct 2017 22:33:30 -0400 From: megous@megous.com To: dev@linux-sunxi.org Cc: Ondrej Jirman , Maxime Ripard , Chen-Yu Tsai , Michael Turquette , Stephen Boyd , linux-arm-kernel@lists.infradead.org (moderated list:ARM/Allwinner sunXi SoC support), linux-clk@vger.kernel.org (open list:COMMON CLK FRAMEWORK), linux-kernel@vger.kernel.org (open list) Subject: [PATCH] clk: sunxi-ng: a83t: Fix invalid csi-mclk mux offset Date: Thu, 5 Oct 2017 04:33:14 +0200 Message-Id: <20171005023314.21663-1-megous@megous.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ondrej Jirman Datasheet specified that parent MUX settings are at bits [10:8], but current implementation specifies incorrect offset at [10:12]. Fix this. Signed-off-by: Ondrej Jirman --- drivers/clk/sunxi-ng/ccu-sun8i-a83t.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c index b0fbdaea76de..d7938ab57429 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-a83t.c @@ -534,7 +534,7 @@ static SUNXI_CCU_M_WITH_MUX_TABLE_GATE(csi_mclk_clk, "csi-mclk", csi_mclk_parents, csi_mclk_table, 0x134, 0, 5, /* M */ - 10, 3, /* mux */ + 8, 3, /* mux */ BIT(15), /* gate */ 0); -- 2.14.2