From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755729AbdJPTTR (ORCPT ); Mon, 16 Oct 2017 15:19:17 -0400 Received: from mga04.intel.com ([192.55.52.120]:41067 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755012AbdJPTTK (ORCPT ); Mon, 16 Oct 2017 15:19:10 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.43,387,1503385200"; d="scan'208";a="1231444131" From: Jarkko Sakkinen To: intel-sgx-kernel-dev@lists.01.org Cc: platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, Kai Huang Subject: [PATCH v4 02/12] x86: add SGX definition to cpufeature Date: Mon, 16 Oct 2017 22:18:45 +0300 Message-Id: <20171016191855.16964-3-jarkko.sakkinen@linux.intel.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171016191855.16964-1-jarkko.sakkinen@linux.intel.com> References: <20171016191855.16964-1-jarkko.sakkinen@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kai Huang Signed-off-by: Kai Huang --- arch/x86/include/asm/cpufeatures.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 2519c6c801c9..31a7d1c0f204 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -219,6 +219,7 @@ /* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */ #define X86_FEATURE_FSGSBASE ( 9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/ #define X86_FEATURE_TSC_ADJUST ( 9*32+ 1) /* TSC adjustment MSR 0x3b */ +#define X86_FEATURE_SGX ( 9*32+ 2) /* Software Guard Extensions */ #define X86_FEATURE_BMI1 ( 9*32+ 3) /* 1st group bit manipulation extensions */ #define X86_FEATURE_HLE ( 9*32+ 4) /* Hardware Lock Elision */ #define X86_FEATURE_AVX2 ( 9*32+ 5) /* AVX2 instructions */ -- 2.14.1