From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756078AbdJPTTS (ORCPT ); Mon, 16 Oct 2017 15:19:18 -0400 Received: from mga14.intel.com ([192.55.52.115]:25851 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755703AbdJPTTR (ORCPT ); Mon, 16 Oct 2017 15:19:17 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.43,387,1503385200"; d="scan'208";a="1231444198" From: Jarkko Sakkinen To: intel-sgx-kernel-dev@lists.01.org Cc: platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, Sean Christopherson , Jarkko Sakkinen Subject: [PATCH v4 03/12] x86: define the feature control MSR's SGX enable bit Date: Mon, 16 Oct 2017 22:18:46 +0300 Message-Id: <20171016191855.16964-4-jarkko.sakkinen@linux.intel.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171016191855.16964-1-jarkko.sakkinen@linux.intel.com> References: <20171016191855.16964-1-jarkko.sakkinen@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sean Christopherson Signed-off-by: Sean Christopherson Signed-off-by: Jarkko Sakkinen --- arch/x86/include/asm/msr-index.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 17f5c12e1afd..b35cb98b5d60 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -435,6 +435,7 @@ #define FEATURE_CONTROL_LOCKED (1<<0) #define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX (1<<1) #define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2) +#define FEATURE_CONTROL_SGX_ENABLE (1<<18) #define FEATURE_CONTROL_LMCE (1<<20) #define MSR_IA32_APICBASE 0x0000001b -- 2.14.1