From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755491AbdJPW0g (ORCPT ); Mon, 16 Oct 2017 18:26:36 -0400 Received: from mail.kernel.org ([198.145.29.99]:36648 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751935AbdJPW0f (ORCPT ); Mon, 16 Oct 2017 18:26:35 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5571F21877 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=helgaas@kernel.org Date: Mon, 16 Oct 2017 17:26:32 -0500 From: Bjorn Helgaas To: Niklas Cassel Cc: Jingoo Han , Joao Pinto , Bjorn Helgaas , Niklas Cassel , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 02/10] PCI: designware-ep: set_msi should only set MMC bits Message-ID: <20171016222632.GL25517@bhelgaas-glaptop.roam.corp.google.com> References: <20171013160914.3220-1-niklas.cassel@axis.com> <20171013160914.3220-3-niklas.cassel@axis.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20171013160914.3220-3-niklas.cassel@axis.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Would you mind capitalizing the first letter of the changelog summary, i.e., to follow the convention of "git log --oneline drivers/pci/dwc/pcie-designware-ep.c"? I usually fix that up manually, but it saves me time if you do it. On Fri, Oct 13, 2017 at 06:09:05PM +0200, Niklas Cassel wrote: > Previously, set_msi wrote all bits in the Message Control > register, thus overwriting the 64 bit address capable bit. > By clearing the 64 bit address capable bit, we break MSI > on systems where the RC has set a 64 bit MSI address. s/set_msi/dw_pcie_ep_set_msi()/ to be specific. I think we overwrote PCI_MSI_FLAGS_64BIT (and PCI_MSI_FLAGS_ENABLE). > Signed-off-by: Niklas Cassel > --- > drivers/pci/dwc/pcie-designware-ep.c | 4 +++- > drivers/pci/dwc/pcie-designware.h | 1 + > 2 files changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/dwc/pcie-designware-ep.c b/drivers/pci/dwc/pcie-designware-ep.c > index d53d5f168363..c92ab87fd660 100644 > --- a/drivers/pci/dwc/pcie-designware-ep.c > +++ b/drivers/pci/dwc/pcie-designware-ep.c > @@ -220,7 +220,9 @@ static int dw_pcie_ep_set_msi(struct pci_epc *epc, u8 encode_int) > struct dw_pcie_ep *ep = epc_get_drvdata(epc); > struct dw_pcie *pci = to_dw_pcie_from_ep(ep); > > - val = (encode_int << MSI_CAP_MMC_SHIFT); > + val = dw_pcie_readw_dbi(pci, MSI_MESSAGE_CONTROL); > + val &= ~MSI_CAP_MMC_MASK; > + val |= (encode_int << MSI_CAP_MMC_SHIFT) & MSI_CAP_MMC_MASK; > dw_pcie_writew_dbi(pci, MSI_MESSAGE_CONTROL, val); > > return 0; > diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie-designware.h > index 547352a317f8..36183906e1d2 100644 > --- a/drivers/pci/dwc/pcie-designware.h > +++ b/drivers/pci/dwc/pcie-designware.h > @@ -101,6 +101,7 @@ > > #define MSI_MESSAGE_CONTROL 0x52 > #define MSI_CAP_MMC_SHIFT 1 > +#define MSI_CAP_MMC_MASK (7 << MSI_CAP_MMC_SHIFT) > #define MSI_CAP_MME_SHIFT 4 > #define MSI_CAP_MME_MASK (7 << MSI_CAP_MME_SHIFT) > #define MSI_MESSAGE_ADDR_L32 0x54 It looks like these are really other names for PCI_MSI_FLAGS_QMASK and PCI_MSI_FLAGS_QSIZE. I wish the DW code used those to make the connection more obvious. But I think this patch is correct as-is and that would be a different patch.