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From: Chen-Yu Tsai <wens@csie.org>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
	David Airlie <airlied@linux.ie>
Cc: Chen-Yu Tsai <wens@csie.org>,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	linux-sunxi@googlegroups.com
Subject: [PATCH v2 6/7] drm/sun4i: hdmi: Document PAD_CTRL1 output invert bits
Date: Tue, 17 Oct 2017 12:23:48 +0800	[thread overview]
Message-ID: <20171017042349.31743-7-wens@csie.org> (raw)
In-Reply-To: <20171017042349.31743-1-wens@csie.org>

While debugging inverted color from the HDMI output on the A10, I
found that the lowest 3 bits were set. These were cleared on A20
boards that had normal display output. By manually toggling these
bits the mapping of the color components to these bits was found.

While these are not used anywhere, it would be nice to document
them somewhere.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
 drivers/gpu/drm/sun4i/sun4i_hdmi.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/sun4i/sun4i_hdmi.h b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
index 9b97da39927e..b685ee11623d 100644
--- a/drivers/gpu/drm/sun4i/sun4i_hdmi.h
+++ b/drivers/gpu/drm/sun4i/sun4i_hdmi.h
@@ -72,6 +72,11 @@
 #define SUN4I_HDMI_PAD_CTRL1_HALVE_CLK		BIT(6)
 #define SUN4I_HDMI_PAD_CTRL1_REG_AMP(n)		(((n) & 7) << 3)
 
+/* These bits seem to invert the TMDS data channels */
+#define SUN4I_HDMI_PAD_CTRL1_INVERT_R		BIT(2)
+#define SUN4I_HDMI_PAD_CTRL1_INVERT_G		BIT(1)
+#define SUN4I_HDMI_PAD_CTRL1_INVERT_B		BIT(0)
+
 #define SUN4I_HDMI_PLL_CTRL_REG		0x208
 #define SUN4I_HDMI_PLL_CTRL_PLL_EN		BIT(31)
 #define SUN4I_HDMI_PLL_CTRL_BWS			BIT(30)
-- 
2.14.2

  parent reply	other threads:[~2017-10-17  4:24 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-17  4:23 [PATCH 0/7] drm/sun4i: More cleanups Chen-Yu Tsai
2017-10-17  4:23 ` [PATCH v2 1/7] drm/sun4i: don't add components that are already in the queue Chen-Yu Tsai
2017-10-17  4:23 ` [PATCH v2 2/7] drm/sun4i: backend: Create regmap after access is possible Chen-Yu Tsai
2017-10-17  4:23 ` [PATCH v2 3/7] drm/sun4i: backend: Use drm_fb_cma_get_gem_addr() to get display memory Chen-Yu Tsai
2017-10-17  4:23 ` [PATCH v2 4/7] drm/sun4i: backend: Add comment explaining why registers are cleared Chen-Yu Tsai
2017-10-17  4:23 ` [PATCH v2 5/7] drm/sun4i: backend: Offset layer buffer address by DRAM starting address Chen-Yu Tsai
2017-10-17 14:26   ` Maxime Ripard
2017-10-17  4:23 ` Chen-Yu Tsai [this message]
2017-10-17  4:23 ` [PATCH v2 7/7] drm/sun4i: hdmi: Move PAD_CTRL1 setting to mode_set function Chen-Yu Tsai
2017-10-17  4:25 ` [PATCH 0/7] drm/sun4i: More cleanups Chen-Yu Tsai

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