From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755555AbdKBNID (ORCPT ); Thu, 2 Nov 2017 09:08:03 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:58116 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932438AbdKBNHY (ORCPT ); Thu, 2 Nov 2017 09:07:24 -0400 From: Ivan Mikhaylov To: Alistair Popple , Matt Porter Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Benjamin Herrenschmidt , Joel Stanley , Paul Mackerras , Michael Ellerman Subject: [PATCH 3/4] 44x/fsp2: tvsense workaround for dd1 Date: Thu, 2 Nov 2017 16:07:05 +0300 X-Mailer: git-send-email 2.10.1 (Apple Git-78) X-MIMETrack: Itemize by SMTP Server on D06ML001/06/M/IBM(Release 9.0.1FP8HF179 | April 20, 2017) at 02/11/2017 13:07:17, Serialize by Router on D06ML001/06/M/IBM(Release 9.0.1FP8HF179 | April 20, 2017) at 02/11/2017 13:07:17, Serialize complete at 02/11/2017 13:07:17 X-TNEFEvaluated: 1 X-TM-AS-GCONF: 00 x-cbid: 17110213-0040-0000-0000-000003E9C21C X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17110213-0041-0000-0000-000025EC4D46 Message-Id: <20171102130706.76056-4-ivan@de.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-11-02_04:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1011 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1711020166 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * tvsense(temperature and voltage sensors) may provide erratic sense values which may result in parity errors on CMU. Signed-off-by: Ivan Mikhaylov --- arch/powerpc/platforms/44x/fsp2.c | 17 +++++++++++++++++ 1 files changed, 17 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/platforms/44x/fsp2.c b/arch/powerpc/platforms/44x/fsp2.c index 9585725..4e12490 100644 --- a/arch/powerpc/platforms/44x/fsp2.c +++ b/arch/powerpc/platforms/44x/fsp2.c @@ -59,6 +59,23 @@ static int __init fsp2_probe(void) mtdcr(DCRN_PLB6_HD, 0xffff0000); mtdcr(DCRN_PLB6_SHD, 0xffff0000); + /* TVSENSE reset is blocked (clock gated) by the POR default of the TVS + * sleep config bit. As a consequence, TVSENSE will provide erratic + * sensor values, which may result in spurious (parity) errors + * recorded in the CMU FIR and leading to erroneous interrupt requests + * once the CMU interrupt is unmasked. + */ + + /* 1. set TVS1[UNDOZE] */ + val = mfcmu(CMUN_TVS1); + val |= 0x4; + mtcmu(CMUN_TVS1, val); + + /* 2. clear FIR[TVS] and FIR[TVSPAR] */ + val = mfcmu(CMUN_FIR0); + val |= 0x30000000; + mtcmu(CMUN_FIR0, val); + /* L2 machine checks */ mtl2(L2PLBMCKEN0, 0xffffffff); mtl2(L2PLBMCKEN1, 0x0000ffff); -- 1.7.1