From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758943AbdKHArO (ORCPT ); Tue, 7 Nov 2017 19:47:14 -0500 Received: from mail-qk0-f193.google.com ([209.85.220.193]:56754 "EHLO mail-qk0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934174AbdKHApY (ORCPT ); Tue, 7 Nov 2017 19:45:24 -0500 X-Google-Smtp-Source: ABhQp+Q0aMmrbiNi0KdBlZdAHzhzDjta14namnZyB3DH0xyc1BpJF+jbyhqObO8FDH2GQSMxHGx2nw== From: Florian Fainelli To: linux-kernel@vger.kernel.org Cc: Florian Fainelli , Matt Mackall , Herbert Xu , Rob Herring , Mark Rutland , Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITE...), Eric Anholt , Stefan Wahren , PrasannaKumar Muralidharan , Russell King , Krzysztof Kozlowski , Harald Freudenberger , Sean Wang , Martin Kaiser , Steffen Trumtrar , linux-crypto@vger.kernel.org (open list:HARDWARE RANDOM NUMBER GENERATOR CORE), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2835 ARM ARCHITECTURE) Subject: [PATCH v2 09/12] hwrng: bcm2835-rng: Add Broadcom MIPS I/O accessors Date: Tue, 7 Nov 2017 16:44:46 -0800 Message-Id: <20171108004449.32730-10-f.fainelli@gmail.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20171108004449.32730-1-f.fainelli@gmail.com> References: <20171108004449.32730-1-f.fainelli@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Broadcom MIPS HW is always strapped to match the system-wide endian such that all I/O access to this RNG block is done with the native CPU endian, account for that. Signed-off-by: Florian Fainelli --- drivers/char/hw_random/bcm2835-rng.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/char/hw_random/bcm2835-rng.c b/drivers/char/hw_random/bcm2835-rng.c index 3a607472687d..6dd8f48701b5 100644 --- a/drivers/char/hw_random/bcm2835-rng.c +++ b/drivers/char/hw_random/bcm2835-rng.c @@ -44,13 +44,22 @@ static inline struct bcm2835_rng_priv *to_rng_priv(struct hwrng *rng) static inline u32 rng_readl(struct bcm2835_rng_priv *priv, u32 offset) { - return readl(priv->base + offset); + /* MIPS chips strapped for BE will automagically configure the + * peripheral registers for CPU-native byte order. + */ + if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) + return __raw_readl(priv->base + offset); + else + return readl(priv->base + offset); } static inline void rng_writel(struct bcm2835_rng_priv *priv, u32 val, u32 offset) { - writel(val, priv->base + offset); + if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) + __raw_writel(val, priv->base + offset); + else + writel(val, priv->base + offset); } static int bcm2835_rng_read(struct hwrng *rng, void *buf, size_t max, -- 2.9.3