From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752991AbdKHTuo (ORCPT ); Wed, 8 Nov 2017 14:50:44 -0500 Received: from mga03.intel.com ([134.134.136.65]:62618 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752826AbdKHTrg (ORCPT ); Wed, 8 Nov 2017 14:47:36 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,365,1505804400"; d="scan'208";a="147592240" Subject: [PATCH 20/30] x86, mm: remove hard-coded ASID limit checks To: linux-kernel@vger.kernel.org Cc: linux-mm@kvack.org, dave.hansen@linux.intel.com, moritz.lipp@iaik.tugraz.at, daniel.gruss@iaik.tugraz.at, michael.schwarz@iaik.tugraz.at, richard.fellner@student.tugraz.at, luto@kernel.org, torvalds@linux-foundation.org, keescook@google.com, hughd@google.com, x86@kernel.org From: Dave Hansen Date: Wed, 08 Nov 2017 11:47:24 -0800 References: <20171108194646.907A1942@viggo.jf.intel.com> In-Reply-To: <20171108194646.907A1942@viggo.jf.intel.com> Message-Id: <20171108194724.C0167D83@viggo.jf.intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Dave Hansen First, it's nice to remove the magic numbers. Second, KAISER is going to eat up half of the available ASID space. We do not use it today, but we need to at least spell out this new restriction. Signed-off-by: Dave Hansen Cc: Moritz Lipp Cc: Daniel Gruss Cc: Michael Schwarz Cc: Richard Fellner Cc: Andy Lutomirski Cc: Linus Torvalds Cc: Kees Cook Cc: Hugh Dickins Cc: x86@kernel.org --- b/arch/x86/include/asm/tlbflush.h | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff -puN arch/x86/include/asm/tlbflush.h~kaiser-pcid-pre-build-asids-macros arch/x86/include/asm/tlbflush.h --- a/arch/x86/include/asm/tlbflush.h~kaiser-pcid-pre-build-asids-macros 2017-11-08 10:45:36.780681376 -0800 +++ b/arch/x86/include/asm/tlbflush.h 2017-11-08 10:45:36.784681376 -0800 @@ -74,6 +74,18 @@ static inline u64 inc_mm_tlb_gen(struct return new_tlb_gen; } +/* There are 12 bits of space for ASIDS in CR3 */ +#define CR3_HW_ASID_BITS 12 +/* When enabled, KAISER consumes a single bit for user/kernel switches */ +#define KAISER_CONSUMED_ASID_BITS 0 + +#define CR3_AVAIL_ASID_BITS (CR3_HW_ASID_BITS-KAISER_CONSUMED_ASID_BITS) +/* + * We lose a single extra ASID because 0 is reserved for use + * by non-PCID-aware users. + */ +#define NR_AVAIL_ASIDS ((1< 4094); + VM_WARN_ON_ONCE(asid > NR_AVAIL_ASIDS); return __sme_pa(pgd) | (asid + 1); } else { VM_WARN_ON_ONCE(asid != 0); @@ -97,7 +109,7 @@ static inline unsigned long build_cr3(pg static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid) { - VM_WARN_ON_ONCE(asid > 4094); + VM_WARN_ON_ONCE(asid > NR_AVAIL_ASIDS); return __sme_pa(pgd) | (asid + 1) | CR3_NOFLUSH; } _