From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754073AbdKIV3u (ORCPT ); Thu, 9 Nov 2017 16:29:50 -0500 Received: from mail-wm0-f67.google.com ([74.125.82.67]:46342 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751174AbdKIV3s (ORCPT ); Thu, 9 Nov 2017 16:29:48 -0500 X-Google-Smtp-Source: AGs4zMaDpWm/wIWD0g2PxCxVjTRB1YTVED17Qkw1q/nNDdx4iip0FmKl61U2Q8j+8rRtHNUpEP1Hkg== Date: Thu, 9 Nov 2017 22:29:45 +0100 From: Pali =?utf-8?B?Um9ow6Fy?= To: Pavel Machek Cc: sre@kernel.org, kernel list , linux-arm-kernel , linux-omap@vger.kernel.org, tony@atomide.com, khilman@kernel.org, aaro.koskinen@iki.fi, ivo.g.dimitrov.75@gmail.com, patrikbachan@gmail.com, serge@hallyn.com, abcloriens@gmail.com, clayton@craftyguy.net, martijn@brixit.nl, sakari.ailus@linux.intel.com, afd@ti.com, kernel@networkimprov.net, devicetree@vger.kernel.org, robh+dt@kernel.org Subject: Re: [PATCH] Add support for bq27521 battery monitor Message-ID: <20171109212945.2sgu56zkse7nbzo3@pali> References: <20171109210615.GA27638@amd> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20171109210615.GA27638@amd> User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thursday 09 November 2017 22:06:15 Pavel Machek wrote: > diff --git a/drivers/power/supply/bq27xxx_battery.c b/drivers/power/supply/bq27xxx_battery.c > index ed44439..ee2851a 100644 > --- a/drivers/power/supply/bq27xxx_battery.c > +++ b/drivers/power/supply/bq27xxx_battery.c > @@ -381,6 +381,30 @@ static u8 bq27xxx_regs[][BQ27XXX_REG_MAX] = { > [BQ27XXX_REG_AP] = INVALID_REG_ADDR, > BQ27XXX_DM_REG_ROWS, > }, > + [BQ27521] = { /* FIXME */ > + [BQ27XXX_REG_CTRL] = 0x02, > + [BQ27XXX_REG_TEMP] = 0x0a, > + [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR, > + [BQ27XXX_REG_VOLT] = 0x0c, > + [BQ27XXX_REG_AI] = 0x0e, > + [BQ27XXX_REG_FLAGS] = 0x08, > + [BQ27XXX_REG_TTE] = INVALID_REG_ADDR, > + [BQ27XXX_REG_TTF] = INVALID_REG_ADDR, > + [BQ27XXX_REG_TTES] = INVALID_REG_ADDR, > + [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR, > + [BQ27XXX_REG_NAC] = INVALID_REG_ADDR, > + [BQ27XXX_REG_FCC] = INVALID_REG_ADDR, > + [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR, > + [BQ27XXX_REG_AE] = INVALID_REG_ADDR, > + [BQ27XXX_REG_SOC] = INVALID_REG_ADDR, > + [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR, > + [BQ27XXX_REG_AP] = INVALID_REG_ADDR, > + [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR, > + [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR, > + [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR, > + [BQ27XXX_DM_DATA] = INVALID_REG_ADDR, > + [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR, > + }, > [BQ27530] = { > [BQ27XXX_REG_CTRL] = 0x00, > [BQ27XXX_REG_TEMP] = 0x06, Hi! IIRC those registers are valid only for sn27521 chip in revision 14 (or new). For older revision is used different register map. And detection of chip revision is somehow possible via some registers. -- Pali Rohár pali.rohar@gmail.com