From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752356AbdKJJ3k (ORCPT ); Fri, 10 Nov 2017 04:29:40 -0500 Received: from mail-wr0-f194.google.com ([209.85.128.194]:52833 "EHLO mail-wr0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751191AbdKJJ3h (ORCPT ); Fri, 10 Nov 2017 04:29:37 -0500 X-Google-Smtp-Source: ABhQp+TMBpqQSCpxi+J8E7rjLkpyqCL+3VkEhkYGIE+lwKq+rew47/4heAFOas4mjiRbNNAxOifprA== Date: Fri, 10 Nov 2017 10:29:33 +0100 From: Ingo Molnar To: "Kirill A. Shutemov" Cc: Ingo Molnar , Linus Torvalds , x86@kernel.org, Thomas Gleixner , "H. Peter Anvin" , Andy Lutomirski , Cyrill Gorcunov , Borislav Petkov , Andi Kleen , linux-mm@kvack.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/4] x86/boot/compressed/64: Introduce place_trampoline() Message-ID: <20171110092933.gt4f3ofhjl4fpuqt@gmail.com> References: <20171101115503.18358-1-kirill.shutemov@linux.intel.com> <20171101115503.18358-4-kirill.shutemov@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20171101115503.18358-4-kirill.shutemov@linux.intel.com> User-Agent: NeoMutt/20170609 (1.8.3) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Kirill A. Shutemov wrote: > --- a/arch/x86/boot/compressed/head_64.S > +++ b/arch/x86/boot/compressed/head_64.S > @@ -315,6 +315,18 @@ ENTRY(startup_64) > * The first step is go into compatibility mode. > */ > > + /* > + * Find suitable place for trampoline and populate it. > + * The address will be stored in RCX. > + * > + * RSI holds real mode data and need to be preserved across > + * a function call. > + */ > + pushq %rsi > + call place_trampoline > + popq %rsi > + movq %rax, %rcx > + > /* Clear additional page table */ > leaq lvl5_pgtable(%rbx), %rdi > xorq %rax, %rax So in the final version of this code we now have: pushq %rsi call need_to_enabled_l5 popq %rsi /* If need_to_enabled_l5() returned zero, we're done here. */ cmpq $0, %rax je lvl5 /* * At this point we are in long mode with 4-level paging enabled, * but we want to enable 5-level paging. * * The problem is that we cannot do it directly. Setting LA57 in * long mode would trigger #GP. So we need to switch off long mode * first. * * We use trampoline in lower memory to handle situation when * bootloader put the kernel image above 4G. * * The first step is go into compatibility mode. */ /* * Find suitable place for trampoline and populate it. * The address will be stored in RCX. * * RSI holds real mode data and need to be preserved across * a function call. */ pushq %rsi call place_trampoline popq %rsi movq %rax, %rcx Firstly, the 'need_to_enabled_l5' name sucks because it includes a typo, but also because the prefix is way too generic. Something like: l5_paging_required() would read a lot better - and would also provide a namespace for all L5 paging related functions. Secondly, couldn't this be combined into a single .c function, named accordingly: l5_paging_prepare() which would return true if L5 paging is available and should be enabled. In this case the trampoline copying function would be called in C, by l5_paging_prepare(). This further reduces the amount of assembly code. Thanks, Ingo