From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751322AbdKLUp1 (ORCPT ); Sun, 12 Nov 2017 15:45:27 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:36918 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751231AbdKLUpY (ORCPT ); Sun, 12 Nov 2017 15:45:24 -0500 Date: Sun, 12 Nov 2017 12:45:10 -0800 From: Ram Pai To: Christophe LEROY Cc: mpe@ellerman.id.au, mingo@redhat.com, akpm@linux-foundation.org, corbet@lwn.net, arnd@arndb.de, linux-arch@vger.kernel.org, ebiederm@xmission.com, linux-doc@vger.kernel.org, x86@kernel.org, dave.hansen@intel.com, linux-kernel@vger.kernel.org, mhocko@kernel.org, linux-mm@kvack.org, paulus@samba.org, aneesh.kumar@linux.vnet.ibm.com, linux-kselftest@vger.kernel.org, bauerman@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org, khandual@linux.vnet.ibm.com Subject: Re: [PATCH v9 00/51] powerpc, mm: Memory Protection Keys Reply-To: Ram Pai References: <1509958663-18737-1-git-send-email-linuxram@us.ibm.com> <45ca9196-1d7d-d530-45df-4ee41773cace@c-s.fr> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <45ca9196-1d7d-d530-45df-4ee41773cace@c-s.fr> User-Agent: Mutt/1.5.20 (2009-12-10) X-TM-AS-GCONF: 00 x-cbid: 17111220-0004-0000-0000-0000133370DA X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008058; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000239; SDB=6.00944932; UDB=6.00476843; IPR=6.00725229; BA=6.00005688; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00017982; XFM=3.00000015; UTC=2017-11-12 20:45:21 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17111220-0005-0000-0000-000084D74A95 Message-Id: <20171112204510.GE5546@ram.oc3035372033.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-11-12_09:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1711120296 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Nov 10, 2017 at 07:10:31PM +0100, Christophe LEROY wrote: > Hi > > Le 06/11/2017 à 09:56, Ram Pai a écrit : > >Memory protection keys enable applications to protect its > >address space from inadvertent access from or corruption > >by itself. > > > >These patches along with the pte-bit freeing patch series > >enables the protection key feature on powerpc; 4k and 64k > >hashpage kernels. It also changes the generic and x86 > >code to expose memkey features through sysfs. Finally > >testcases and Documentation is updated. > > > >All patches can be found at -- > >https://github.com/rampai/memorykeys.git memkey.v9 > > As far as I can see you are focussing the implementation on 64 bits > powerpc. This could also be implemented on 32 bits powerpc, for > instance the 8xx has MMU Access Protection Registers which can be > used to define 16 domains and could I think be used for implementing > protection keys. I was assuming non-existence of any 32bit powerpc systems supporting memory keys. Sounds like it was a wrong assumption. However, I think, the framework as it stands today should work. All the functionality is captured in pkeys.c and pkeys.h which are generic ppc files. Its just a matter of providing the 32-bit implementation for whichever sub-arch that support it. Can you point me to problem areas? I will fix them. Thanks for you interest. Togather we should be able to make it happen. > Of course the challenge after that would be to find 4 spare PTE > bits, I'm sure we can find them on the 8xx, at least when using 16k > pages we have 2 bits already available, then by merging PAGE_SHARED > and PAGE_USER and by reducing PAGE_RO to only one bit we can get the > 4 spare bits. yes. This needs to happen parallely. RP > > Therefore I think it would be great if you could implement a > framework common to both PPC32 and PPC64.