From: Yi Zhang <yi.z.zhang@linux.intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
rkrcmar@redhat.com, ravi.sahita@intel.com
Subject: Re: [PATCH RFC 00/10] Intel EPT-Based Sub-page Write Protection Support.
Date: Mon, 13 Nov 2017 18:37:59 +0800 [thread overview]
Message-ID: <20171113103758.GA29311@dazhang1-ssd.sh.intel.com> (raw)
In-Reply-To: <e6b24844-e749-f3c3-3847-8bff14a68d6d@redhat.com>
On 2017-11-10 at 16:39:27 +0100, Paolo Bonzini wrote:
> On 04/11/2017 17:54, Paolo Bonzini wrote:
> > On 04/11/2017 01:12, Yi Zhang wrote:
> >>>
> >> Adding Ravi,
> >>
> >> Does anyone have further comments on current implementation, it is a
> >> important feature in our next generation chip-set.
> >
> > What matters is not the feature, but the use case; without a use case,
> > there is no point in including code for SPP in KVM. KVM doesn't use
> > VMFUNC or #VE for example, because they are not necessary.
> >
> > SPP may become useful once we have the introspection interface. Or, if
> > another hypervisor uses it, support for nested SPP may be useful (for
> > example we support nested VMFUNC and should get nested #VE sooner or
> > later, even though the features are not used on bare metal).
> >
> > Right now, however, supporting SPP does not seem to be particularly
> > important honestly.
>
> Hi Yi Zhang,
>
> are you going to work on nested SPP? I guess that would be most useful
> way to add SPP support to KVM (and you could also test it with
> kvm-unit-tests).
Hi Paolo,
We Haven't planing on the nested support yet, so far there are many hardware
assistance work on current SPP implemetation, and apply it in next
generration icelake chip-set.
Regards
Yi.
>
> Thanks,
>
> Paolo
prev parent reply other threads:[~2017-11-13 1:55 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-13 23:11 Zhang Yi
2017-10-13 16:57 ` Jim Mattson
2017-10-13 21:13 ` Paolo Bonzini
2017-10-16 0:08 ` Yi Zhang
2017-10-18 9:35 ` Paolo Bonzini
2017-10-18 14:07 ` Yi Zhang
2017-10-19 11:57 ` Paolo Bonzini
2017-10-20 8:51 ` Yi Zhang
2017-10-18 14:13 ` Mihai Donțu
2017-10-20 8:47 ` Yi Zhang
2017-10-20 17:06 ` Mihai Donțu
2017-10-24 7:52 ` Yi Zhang
2017-10-16 0:01 ` Yi Zhang
2017-10-13 23:12 ` [PATCH RFC 01/10] KVM: VMX: Added EPT Subpage Protection Documentation Zhang Yi
2017-10-13 23:12 ` [PATCH RFC 02/10] x86/cpufeature: Add intel Sub-Page Protection to CPU features Zhang Yi
2017-10-13 23:13 ` [PATCH RFC 03/10] KVM: VMX: Added VMX SPP feature flags and VM-Execution Controls Zhang Yi
2017-10-13 23:13 ` [PATCH RFC 04/10] KVM: VMX: Introduce the SPPTP and SPP page table Zhang Yi
2017-10-13 23:14 ` [PATCH RFC 05/10] KVM: VMX: Introduce SPP-Induced vm exit and it's handle Zhang Yi
2017-10-13 23:14 ` [PATCH RFC 06/10] KVM: VMX: Added handle of SPP write protection fault Zhang Yi
2017-10-13 23:14 ` [PATCH RFC 07/10] KVM: VMX: Introduce ioctls to set/get Sub-Page Write Protection Zhang Yi
2017-10-13 23:14 ` [PATCH RFC 08/10] KVM: VMX: Update the EPT leaf entry indicated with the SPP enable bit Zhang Yi
2017-10-13 23:14 ` [PATCH RFC 09/10] KVM: VMX: Added setup spp page structure Zhang Yi
2017-10-13 23:16 ` [PATCH RFC 10/10] KVM: VMX: implement setup SPP page structure in spp miss Zhang Yi
2017-10-18 7:09 ` [PATCH RFC 00/10] Intel EPT-Based Sub-page Write Protection Support Christoph Hellwig
2017-10-18 14:02 ` Yi Zhang
2017-11-04 0:12 ` Yi Zhang
2017-11-04 16:54 ` Paolo Bonzini
2017-11-10 15:39 ` Paolo Bonzini
2017-11-13 10:37 ` Yi Zhang [this message]
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