From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934362AbdKQIDl (ORCPT ); Fri, 17 Nov 2017 03:03:41 -0500 Received: from mail-sh2.amlogic.com ([58.32.228.45]:57064 "EHLO mail-sh2.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965059AbdKQIDQ (ORCPT ); Fri, 17 Nov 2017 03:03:16 -0500 From: Yixun Lan To: Wolfram Sang , Rob Herring , Mark Rutland , , , Kevin Hilman CC: Neil Armstrong , Jerome Brunet , Carlo Caione , Yixun Lan , Jian Hu , , , Subject: [PATCH 4/5] ARM64: dts: meson-axg: describe pin DT info for I2C controller Date: Fri, 17 Nov 2017 16:02:35 +0800 Message-ID: <20171117080236.32504-5-yixun.lan@amlogic.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20171117080236.32504-1-yixun.lan@amlogic.com> References: <20171117080236.32504-1-yixun.lan@amlogic.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.18.20.164] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Jian Hu Describe all the pin mux for the I2C controller which found in Meson-AXG SoC. Signed-off-by: Jian Hu Signed-off-by: Yixun Lan --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 64 ++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 99e967aff439..edbfd6022078 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -304,6 +304,70 @@ function = "eth"; }; }; + + i2c_m0_pins: i2c_m0 { + mux { + groups = "i2c_sck_m0", + "i2c_sda_m0"; + function = "i2c_m0"; + }; + }; + + i2c_m1_z_pins: i2c_m1_z { + mux { + groups = "i2c_sck_m1_z", + "i2c_sda_m1_z"; + function = "i2c_m1"; + }; + }; + + i2c_m1_x_pins: i2c_m1_x { + mux { + groups = "i2c_sck_m1_x", + "i2c_sda_m1_x"; + function = "i2c_m1"; + }; + }; + + i2c_m2_x_pins: i2c_m2_x { + mux { + groups = "i2c_sck_m2_x", + "i2c_sda_m2_x"; + function = "i2c_m2"; + }; + }; + + i2c_m2_a_pins: i2c_m2_a { + mux { + groups = "i2c_sck_m2_a", + "i2c_sda_m2_a"; + function = "i2c_m2"; + }; + }; + + i2c_m3_a6_pins: i2c_m3_a6 { + mux { + groups = "i2c_sda_m3_a6", + "i2c_sck_m3_a7"; + function = "i2c_m3"; + }; + }; + + i2c_m3_a12_pins: i2c_m3_a12 { + mux { + groups = "i2c_sda_m3_a12", + "i2c_sck_m3_a13"; + function = "i2c_m3"; + }; + }; + + i2c_m3_a19_pins: i2c_m3_a19 { + mux { + groups = "i2c_sda_m3_a19", + "i2c_sck_m3_a20"; + function = "i2c_m3"; + }; + }; }; }; -- 2.14.1