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From: Sudeep Holla <sudeep.holla@arm.com>
To: Tan Xiaojun <tanxiaojun@huawei.com>
Cc: gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org,
	Sudeep Holla <sudeep.holla@arm.com>
Subject: Re: [PATCH] drivers: base: cacheinfo: support DT overrides for cache type
Date: Fri, 17 Nov 2017 11:13:51 +0000	[thread overview]
Message-ID: <20171117111351.GA20137@e107155-lin> (raw)
In-Reply-To: <5A0E45D3.1090803@huawei.com>

On Fri, Nov 17, 2017 at 10:13:39AM +0800, Tan Xiaojun wrote:
> On 2017/11/16 23:23, Sudeep Holla wrote:
> > 
> > I assume L3 is outer non-architected system cache.
> > 
> 
> Yes.
>

Good.

> OK. That's fine. I will test this.

Thanks.

> By the way, Arm64 tend to use acpi way to boot now. Is there some
> suitable solution for acpi?
>

Yes Jeremy is currently working on it[1] and IIRC Xiongfeng Wang from Huawei
was testing them[2]. You need to talk to him ;)

--
Regards,
Sudeep

[1] https://marc.info/?l=linux-pm&m=151026155606677&w=2
[2] https://marc.info/?l=linux-pm&m=151073816218307&w=2

  parent reply	other threads:[~2017-11-17 11:14 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-16 12:58 Tan Xiaojun
2017-11-16 15:23 ` Sudeep Holla
2017-11-17  2:13   ` Tan Xiaojun
2017-11-17  5:37     ` Tan Xiaojun
2017-11-17 11:16       ` Sudeep Holla
2017-11-17 11:13     ` Sudeep Holla [this message]
2017-11-20  1:18       ` Tan Xiaojun

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