From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752939AbdK2UVe (ORCPT ); Wed, 29 Nov 2017 15:21:34 -0500 Received: from mail-qk0-f194.google.com ([209.85.220.194]:44222 "EHLO mail-qk0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752888AbdK2UV3 (ORCPT ); Wed, 29 Nov 2017 15:21:29 -0500 X-Google-Smtp-Source: AGs4zMaM38HKFvCw4AsEuHjhoPmU+FXJvS3ezotGNqA6A/BclSCfO3wdT5ppH9D7FQLyOMM1V+vA2g== From: Florian Fainelli To: bcm-kernel-feedback-list@broadcom.com Cc: Florian Fainelli , Rob Herring , Mark Rutland , Brian Norris , Gregory Fong , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 2/9] dt-bindings: arm: brcmstb: Correct BIUCTRL node documentation Date: Wed, 29 Nov 2017 12:18:42 -0800 Message-Id: <20171129201849.17522-3-f.fainelli@gmail.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20171129201849.17522-1-f.fainelli@gmail.com> References: <20171129201849.17522-1-f.fainelli@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Correct the Device Tree bindings for the HIF_CPUBIUCTRL node whose compatible string is actually brcm,bcm-cpu-biu-ctrl. Also document in the binding the fallback property ("brcm,brcmstb-cpu-biu-ctrl") and update the example accordingly. Signed-off-by: Florian Fainelli --- .../devicetree/bindings/arm/bcm/brcm,brcmstb.txt | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt index 790e6b0b8306..05be8d1f7be6 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt @@ -17,21 +17,23 @@ Further, syscon nodes that map platform-specific registers used for general system control is required: - compatible: "brcm,bcm-sun-top-ctrl", "syscon" - - compatible: "brcm,bcm-hif-cpubiuctrl", "syscon" + - compatible: "brcm,bcm-cpu-biu-ctrl", + "brcm,brcmstb-cpu-biu-ctrl", + "syscon" - compatible: "brcm,bcm-hif-continuation", "syscon" -hif-cpubiuctrl node +cpu-biu-ctrl node ------------------- -SoCs with Broadcom Brahma15 ARM-based CPUs have a specific Bus Interface Unit -(BIU) block which controls and interfaces the CPU complex to the different -Memory Controller Ports (MCP), one per memory controller (MEMC). This BIU block -offers a feature called Write Pairing which consists in collapsing two adjacent -cache lines into a single (bursted) write transaction towards the memory -controller (MEMC) to maximize write bandwidth. +SoCs with Broadcom Brahma15 ARM-based and Brahma53 ARM64-based CPUs have a +specific Bus Interface Unit (BIU) block which controls and interfaces the CPU +complex to the different Memory Controller Ports (MCP), one per memory +controller (MEMC). This BIU block offers a feature called Write Pairing which +consists in collapsing two adjacent cache lines into a single (bursted) write +transaction towards the memory controller (MEMC) to maximize write bandwidth. Required properties: - - compatible: must be "brcm,bcm7445-hif-cpubiuctrl", "syscon" + - compatible: must be "brcm,bcm7445-cpu-biu-ctrl", "syscon" Optional properties: @@ -52,7 +54,7 @@ example: }; hif_cpubiuctrl: syscon@3e2400 { - compatible = "brcm,bcm7445-hif-cpubiuctrl", "syscon"; + compatible = "brcm,bcm7445-cpu-biu-ctrl", "brcm,brcmstb-cpu-biu-ctrl", "syscon"; reg = <0x3e2400 0x5b4>; brcm,write-pairing; }; -- 2.9.3