From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753234AbdK2Xfv (ORCPT ); Wed, 29 Nov 2017 18:35:51 -0500 Received: from mail-pg0-f67.google.com ([74.125.83.67]:38647 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752952AbdK2Xfu (ORCPT ); Wed, 29 Nov 2017 18:35:50 -0500 X-Google-Smtp-Source: AGs4zMZ4BW90a9gEuAd8phVFR+PYj1/ctAuHRFLgvWsJDxYX0XI+JUAbthzFNgt7taf7On2ZHSBAzA== From: Brian Norris To: Heiko Stuebner Cc: , , mka@chromium.org, Doug Anderson , , Nickey Yang , Brian Norris Subject: [PATCH] arm64: dts: rockchip: add rk3399 DSI0 reset Date: Wed, 29 Nov 2017 15:35:41 -0800 Message-Id: <20171129233541.51337-1-briannorris@chromium.org> X-Mailer: git-send-email 2.15.0.531.g2ccb3012c9-goog Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We've documented this one already, but we didn't add it to the DTSI yet. Suggested-by: Nickey Yang Signed-off-by: Brian Norris --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index c6dae25a3f23..8940a3dc3670 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1648,6 +1648,8 @@ <&cru SCLK_DPHY_TX0_CFG>, <&cru PCLK_VIO_GRF>; clock-names = "ref", "pclk", "phy_cfg", "grf"; power-domains = <&power RK3399_PD_VIO>; + resets = <&cru SRST_P_MIPI_DSI0>; + reset-names = "apb"; rockchip,grf = <&grf>; status = "disabled"; -- 2.15.0.531.g2ccb3012c9-goog