From: Olof Johansson <olof@lixom.net>
To: Palmer Dabbelt <palmer@sifive.com>
Cc: Albert Ou <albert@sifive.com>,
patches@groups.riscv.org, linux-kernel@vger.kernel.org,
Olof Johansson <olof@lixom.net>
Subject: [PATCH 02/10] RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macros
Date: Wed, 29 Nov 2017 17:55:13 -0800 [thread overview]
Message-ID: <20171130015521.1289-3-olof@lixom.net> (raw)
In-Reply-To: <20171130015521.1289-1-olof@lixom.net>
INT and SHORT are used by some drivers that pull in the include files,
so prefixing helps avoid namespace conflicts. Other constructs in the
same file already uses this.
Fixes, among others, these warnings with allmodconfig:
../sound/core/pcm_misc.c:43:0: warning: "INT" redefined
#define INT __force int
Signed-off-by: Olof Johansson <olof@lixom.net>
---
arch/riscv/include/asm/asm.h | 12 ++++++------
arch/riscv/include/asm/bug.h | 6 +++---
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
index 6cbbb6a..5ad4cb6 100644
--- a/arch/riscv/include/asm/asm.h
+++ b/arch/riscv/include/asm/asm.h
@@ -58,17 +58,17 @@
#endif
#if (__SIZEOF_INT__ == 4)
-#define INT __ASM_STR(.word)
-#define SZINT __ASM_STR(4)
-#define LGINT __ASM_STR(2)
+#define RISCV_INT __ASM_STR(.word)
+#define RISCV_SZINT __ASM_STR(4)
+#define RISCV_LGINT __ASM_STR(2)
#else
#error "Unexpected __SIZEOF_INT__"
#endif
#if (__SIZEOF_SHORT__ == 2)
-#define SHORT __ASM_STR(.half)
-#define SZSHORT __ASM_STR(2)
-#define LGSHORT __ASM_STR(1)
+#define RISCV_SHORT __ASM_STR(.half)
+#define RISCV_SZSHORT __ASM_STR(2)
+#define RISCV_LGSHORT __ASM_STR(1)
#else
#error "Unexpected __SIZEOF_SHORT__"
#endif
diff --git a/arch/riscv/include/asm/bug.h b/arch/riscv/include/asm/bug.h
index c3e1376..bfc7f09 100644
--- a/arch/riscv/include/asm/bug.h
+++ b/arch/riscv/include/asm/bug.h
@@ -27,8 +27,8 @@
typedef u32 bug_insn_t;
#ifdef CONFIG_GENERIC_BUG_RELATIVE_POINTERS
-#define __BUG_ENTRY_ADDR INT " 1b - 2b"
-#define __BUG_ENTRY_FILE INT " %0 - 2b"
+#define __BUG_ENTRY_ADDR RISCV_INT " 1b - 2b"
+#define __BUG_ENTRY_FILE RISCV_INT " %0 - 2b"
#else
#define __BUG_ENTRY_ADDR RISCV_PTR " 1b"
#define __BUG_ENTRY_FILE RISCV_PTR " %0"
@@ -38,7 +38,7 @@ typedef u32 bug_insn_t;
#define __BUG_ENTRY \
__BUG_ENTRY_ADDR "\n\t" \
__BUG_ENTRY_FILE "\n\t" \
- SHORT " %1"
+ RISCV_SHORT " %1"
#else
#define __BUG_ENTRY \
__BUG_ENTRY_ADDR
--
2.8.6
next prev parent reply other threads:[~2017-11-30 1:57 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-30 1:55 [PATCH 00/10] RISC-V: Fixes for clean allmodconfig build Olof Johansson
2017-11-30 1:55 ` [PATCH 01/10] RISC-V: use generic serial.h Olof Johansson
2017-11-30 1:55 ` Olof Johansson [this message]
2017-11-30 1:55 ` [PATCH 03/10] RISC-V: io.h: type fixes for warnings Olof Johansson
2017-11-30 1:55 ` [PATCH 04/10] RISC-V: move empty_zero_page definition to C and export it Olof Johansson
2017-11-30 1:55 ` [PATCH 05/10] RISC-V: Export some expected symbols for modules Olof Johansson
2017-11-30 1:55 ` [PATCH 06/10] RISC-V: Provide stub of setup_profiling_timer() Olof Johansson
2017-11-30 18:26 ` [patches] " Palmer Dabbelt
2017-11-30 1:55 ` [PATCH 07/10] RISC-V: Use define for get_cycles like other architectures Olof Johansson
2017-11-30 1:55 ` [PATCH 08/10] RISC-V: Set __ARCH_WANT_RENAMEAT to pick up generic version Olof Johansson
2017-11-30 18:30 ` Christoph Hellwig
2017-11-30 18:38 ` [patches] " Palmer Dabbelt
2017-11-30 20:21 ` Olof Johansson
2017-12-01 18:27 ` Christoph Hellwig
2017-11-30 1:55 ` [PATCH 09/10] RISC-V: Add missing include Olof Johansson
2017-11-30 1:55 ` [PATCH 10/10] input: joystick: riscv has get_cycles Olof Johansson
2017-11-30 6:48 ` Dmitry Torokhov
2017-11-30 18:26 ` [patches] [PATCH 00/10] RISC-V: Fixes for clean allmodconfig build Palmer Dabbelt
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