From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752464AbdLEGsV (ORCPT ); Tue, 5 Dec 2017 01:48:21 -0500 Received: from fllnx210.ext.ti.com ([198.47.19.17]:61969 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752352AbdLEGsQ (ORCPT ); Tue, 5 Dec 2017 01:48:16 -0500 From: Vignesh R To: Santosh Shilimkar CC: Rob Herring , , , , Vignesh R , Franklin S Cooper Jr Subject: [PATCH 2/2] ARM: dts: keystone-k2g-evm: Enable UART 2 Date: Tue, 5 Dec 2017 12:18:12 +0530 Message-ID: <20171205064812.15758-3-vigneshr@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171205064812.15758-1-vigneshr@ti.com> References: <20171205064812.15758-1-vigneshr@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Franklin S Cooper Jr 66AK2G GP EVM has a Baseboard Management Controller (BMC) on board. This controller handles things like setting the SoCs boot mode along with controlling the on board character LCD display module. Enable UART2 which communicates with the BMC. This enables userspace applications to display something on the onboard LCD controlled by the BMC. Signed-off-by: Franklin S Cooper Jr Signed-off-by: Vignesh R --- arch/arm/boot/dts/keystone-k2g-evm.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/keystone-k2g-evm.dts b/arch/arm/boot/dts/keystone-k2g-evm.dts index 8d100217e38f..9737730ddc21 100644 --- a/arch/arm/boot/dts/keystone-k2g-evm.dts +++ b/arch/arm/boot/dts/keystone-k2g-evm.dts @@ -115,6 +115,13 @@ K2G_CORE_IOPAD(0x121c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_csn0.qspi_csn0 */ >; }; + + uart2_pins: pinmux_uart2_pins { + pinctrl-single,pins = < + K2G_CORE_IOPAD(0x11ec) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart2_rxd.uart2_rxd */ + K2G_CORE_IOPAD(0x11f0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart2_txd.uart2_txd */ + >; + }; }; &uart0 { @@ -263,3 +270,9 @@ }; }; }; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; +}; -- 2.15.0