From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752194AbdLFV1q (ORCPT ); Wed, 6 Dec 2017 16:27:46 -0500 Received: from mail.kernel.org ([198.145.29.99]:59112 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751598AbdLFV1o (ORCPT ); Wed, 6 Dec 2017 16:27:44 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 439FA20C51 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=helgaas@kernel.org Date: Wed, 6 Dec 2017 15:27:41 -0600 From: Bjorn Helgaas To: Cyrille Pitchen Cc: bhelgaas@google.com, kishon@ti.com, lorenzo.pieralisi@arm.com, linux-pci@vger.kernel.org, adouglas@cadence.com, stelford@cadence.com, dgary@cadence.com, kgopi@cadence.com, eandrews@cadence.com, thomas.petazzoni@free-electrons.com, sureshp@cadence.com, nsekhar@ti.com, linux-kernel@vger.kernel.org, robh@kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 1/5] PCI: Add vendor ID for Cadence Message-ID: <20171206212741.GP23510@bhelgaas-glaptop.roam.corp.google.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Nov 23, 2017 at 04:01:46PM +0100, Cyrille Pitchen wrote: > This patch adds a new PCI vendor ID for Cadence. > > Signed-off-by: Cyrille Pitchen Acked-by: Bjorn Helgaas I assume Lorenzo will merge this along with the rest of the Cadence support. > --- > include/linux/pci_ids.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h > index ab20dc5db423..eb13e84e1fef 100644 > --- a/include/linux/pci_ids.h > +++ b/include/linux/pci_ids.h > @@ -2381,6 +2381,8 @@ > > #define PCI_VENDOR_ID_LENOVO 0x17aa > > +#define PCI_VENDOR_ID_CDNS 0x17cd > + > #define PCI_VENDOR_ID_ARECA 0x17d3 > #define PCI_DEVICE_ID_ARECA_1110 0x1110 > #define PCI_DEVICE_ID_ARECA_1120 0x1120 > -- > 2.11.0 >