From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752217AbdLLKCI (ORCPT ); Tue, 12 Dec 2017 05:02:08 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:1621 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752102AbdLLKCF (ORCPT ); Tue, 12 Dec 2017 05:02:05 -0500 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 12 Dec 2017 02:02:05 -0800 Date: Tue, 12 Dec 2017 12:02:00 +0200 From: Peter De Schrijver To: Dmitry Osipenko CC: Prashant Gaikwad , Michael Turquette , Stephen Boyd , "Thierry Reding" , Jonathan Hunter , , , Subject: Re: [PATCH v1] clk: tegra20: Add 216 MHz entry for PLL_X Message-ID: <20171212100200.GW32106@tbergstrom-lnx.Nvidia.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-NVConfidentiality: public User-Agent: Mutt/1.5.21 (2010-09-15) X-Originating-IP: [10.21.24.170] X-ClientProxiedBy: UKMAIL101.nvidia.com (10.26.138.13) To UKMAIL101.nvidia.com (10.26.138.13) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Dec 11, 2017 at 09:50:09PM +0300, Dmitry Osipenko wrote: > The cpufreq driver uses 216 MHz as the lowest CPU clock frequency, but > clock driver doesn't provide that rate, so the requested clock is rounded > up to 312 MHz. Let's add entry for 216 MHz to match with cpufreq. > This seems odd. If there's no table entry, _calc_rate should kick in and calculate the parameters for 216MHz. Any idea why this is not happening? Peter. > Signed-off-by: Dmitry Osipenko > --- > drivers/clk/tegra/clk-tegra20.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c > index cbd5a2e5c569..e33d7548a4e9 100644 > --- a/drivers/clk/tegra/clk-tegra20.c > +++ b/drivers/clk/tegra/clk-tegra20.c > @@ -269,6 +269,11 @@ static struct tegra_clk_pll_freq_table pll_x_freq_table[] = { > { 13000000, 312000000, 312, 13, 1, 12 }, > { 19200000, 312000000, 260, 16, 1, 8 }, > { 26000000, 312000000, 312, 26, 1, 12 }, > + /* 216 MHz */ > + { 12000000, 216000000, 216, 12, 1, 12 }, > + { 13000000, 216000000, 216, 13, 1, 12 }, > + { 19200000, 216000000, 180, 16, 1, 8 }, > + { 26000000, 216000000, 216, 26, 1, 12 }, > { 0, 0, 0, 0, 0, 0 }, > }; > > -- > 2.15.1 >