From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753560AbdLSX2c (ORCPT ); Tue, 19 Dec 2017 18:28:32 -0500 Received: from mail-pf0-f193.google.com ([209.85.192.193]:41088 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753280AbdLSX23 (ORCPT ); Tue, 19 Dec 2017 18:28:29 -0500 X-Google-Smtp-Source: ACJfBosNCuNX328Q/AXelaH0mp7TcvlKzv2dH79S35kAkpYwEN13Mb0QzQn+hT+V37v2/P9y4OzSZQ== Date: Tue, 19 Dec 2017 17:28:26 -0600 From: Rob Herring To: Cyrille Pitchen Cc: bhelgaas@google.com, kishon@ti.com, lorenzo.pieralisi@arm.com, linux-pci@vger.kernel.org, adouglas@cadence.com, stelford@cadence.com, dgary@cadence.com, kgopi@cadence.com, eandrews@cadence.com, thomas.petazzoni@free-electrons.com, sureshp@cadence.com, nsekhar@ti.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v2 5/9] dt-bindings: PCI: cadence: Add DT bindings for Cadence PCIe host controller Message-ID: <20171219232826.odhkybf2xostfei2@rob-hp-laptop> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20170609 (1.8.3) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Dec 18, 2017 at 07:16:05PM +0100, Cyrille Pitchen wrote: > From: Scott Telford > > This patch adds documentation for the DT bindings of the Cadence PCIe > controller when configured in host (Root Complex) mode. > > Signed-off-by: Scott Telford > Signed-off-by: Cyrille Pitchen > --- > .../bindings/pci/cdns,cdns-pcie-host.txt | 60 ++++++++++++++++++++++ > 1 file changed, 60 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt Reviewed-by: Rob Herring