From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751157AbdLaLoF (ORCPT ); Sun, 31 Dec 2017 06:44:05 -0500 Received: from mga06.intel.com ([134.134.136.31]:47900 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750923AbdLaLoD (ORCPT ); Sun, 31 Dec 2017 06:44:03 -0500 X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,486,1508828400"; d="gz'50?scan'50,208,50";a="191351280" Date: Sun, 31 Dec 2017 19:43:16 +0800 From: kbuild test robot To: Jia Zhang Cc: kbuild-all@01.org, bp@alien8.de, mingo@redhat.com, hpa@zytor.com, tglx@linutronix.de, tony.luck@intel.com, x86@kernel.org, linux-kernel@vger.kernel.org, Jia Zhang Subject: Re: [PATCH] x86: clean up confusing x86_mask Message-ID: <201712311901.oSXQgpMU%fengguang.wu@intel.com> References: <1514557944-119237-1-git-send-email-qianyue.zj@alibaba-inc.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="Q68bSM7Ycu6FN28Q" Content-Disposition: inline In-Reply-To: <1514557944-119237-1-git-send-email-qianyue.zj@alibaba-inc.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-SA-Exim-Connect-IP: X-SA-Exim-Mail-From: fengguang.wu@intel.com X-SA-Exim-Scanned: No (on bee); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --Q68bSM7Ycu6FN28Q Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi Jia, Thank you for the patch! Yet something to improve: [auto build test ERROR on v4.15-rc5] [also build test ERROR on next-20171222] [cannot apply to tip/x86/core] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Jia-Zhang/x86-clean-up-confusing-x86_mask/20171231-182946 config: x86_64-acpi-redef (attached as .config) compiler: gcc-7 (Debian 7.2.0-12) 7.2.1 20171025 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All error/warnings (new ones prefixed by >>): In file included from include/linux/kernel.h:14:0, from drivers//cpufreq/speedstep-lib.c:13: drivers//cpufreq/speedstep-lib.c: In function 'speedstep_detect_processor': >> drivers//cpufreq/speedstep-lib.c:275:57: error: 'struct cpuinfo_x86' has no member named 'x86_mask'; did you mean 'x86_model'? pr_debug("ebx value is %x, x86_mask is %x\n", ebx, c->x86_mask); ^ include/linux/printk.h:136:17: note: in definition of macro 'no_printk' printk(fmt, ##__VA_ARGS__); \ ^~~~~~~~~~~ >> drivers//cpufreq/speedstep-lib.c:275:3: note: in expansion of macro 'pr_debug' pr_debug("ebx value is %x, x86_mask is %x\n", ebx, c->x86_mask); ^~~~~~~~ drivers//cpufreq/speedstep-lib.c:277:14: error: 'struct cpuinfo_x86' has no member named 'x86_mask'; did you mean 'x86_model'? switch (c->x86_mask) { ^~~~~~~~ x86_model drivers//cpufreq/speedstep-lib.c:364:11: error: 'struct cpuinfo_x86' has no member named 'x86_mask'; did you mean 'x86_model'? if (c->x86_mask == 0x01) { ^~~~~~~~ x86_model -- drivers//cpufreq/speedstep-centrino.c: In function 'centrino_verify_cpu_id': >> drivers//cpufreq/speedstep-centrino.c:280:10: error: 'const struct cpuinfo_x86' has no member named 'x86_mask'; did you mean 'x86_model'? (c->x86_mask == x->x86_mask)) ^~~~~~~~ x86_model -- drivers//cpufreq/p4-clockmod.c: In function 'cpufreq_p4_cpu_init': >> drivers//cpufreq/p4-clockmod.c:171:51: error: 'struct cpuinfo_x86' has no member named 'x86_mask'; did you mean 'x86_model'? cpuid = (c->x86 << 8) | (c->x86_model << 4) | c->x86_mask; ^~~~~~~~ x86_model -- drivers//hwmon/hwmon-vid.c: In function 'vid_which_vrm': >> drivers//hwmon/hwmon-vid.c:296:46: error: 'struct cpuinfo_x86' has no member named 'x86_mask'; did you mean 'x86_model'? vrm_ret = find_vrm(c->x86, c->x86_model, c->x86_mask, c->x86_vendor); ^~~~~~~~ x86_model -- drivers//hwmon/k10temp.c: In function 'has_erratum_319': >> drivers//hwmon/k10temp.c:229:56: error: 'struct cpuinfo_x86' has no member named 'x86_mask'; did you mean 'x86_model'? (boot_cpu_data.x86_model == 4 && boot_cpu_data.x86_mask <= 2); ^~~~~~~~ x86_model >> drivers//hwmon/k10temp.c:230:1: warning: control reaches end of non-void function [-Wreturn-type] } ^ vim +275 drivers//cpufreq/speedstep-lib.c ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 248 ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 249 ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 250 /********************************************************************* ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 251 * DETECT SPEEDSTEP-CAPABLE PROCESSOR * ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 252 *********************************************************************/ ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 253 fa8031ae drivers/cpufreq/speedstep-lib.c Andi Kleen 2012-01-26 254 /* Keep in sync with the x86_cpu_id tables in the different modules */ ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 255 unsigned int speedstep_detect_processor(void) ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 256 { 92cb7612 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Mike Travis 2007-10-19 257 struct cpuinfo_x86 *c = &cpu_data(0); ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 258 u32 ebx, msr_lo, msr_hi; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 259 2d06d8c4 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dominik Brodowski 2011-03-27 260 pr_debug("x86: %x, model: %x\n", c->x86, c->x86_model); ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 261 ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 262 if ((c->x86_vendor != X86_VENDOR_INTEL) || ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 263 ((c->x86 != 6) && (c->x86 != 0xF))) ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 264 return 0; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 265 ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 266 if (c->x86 == 0xF) { ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 267 /* Intel Mobile Pentium 4-M ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 268 * or Intel Mobile Pentium 4 with 533 MHz FSB */ ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 269 if (c->x86_model != 2) ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 270 return 0; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 271 ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 272 ebx = cpuid_ebx(0x00000001); ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 273 ebx &= 0x000000FF; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 274 2d06d8c4 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dominik Brodowski 2011-03-27 @275 pr_debug("ebx value is %x, x86_mask is %x\n", ebx, c->x86_mask); ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 276 ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 277 switch (c->x86_mask) { ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 278 case 4: ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 279 /* ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 280 * B-stepping [M-P4-M] ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 281 * sample has ebx = 0x0f, production has 0x0e. ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 282 */ ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 283 if ((ebx == 0x0e) || (ebx == 0x0f)) bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 284 return SPEEDSTEP_CPU_P4M; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 285 break; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 286 case 7: ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 287 /* ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 288 * C-stepping [M-P4-M] ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 289 * needs to have ebx=0x0e, else it's a celeron: ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 290 * cf. 25130917.pdf / page 7, footnote 5 even ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 291 * though 25072120.pdf / page 7 doesn't say ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 292 * samples are only of B-stepping... ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 293 */ ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 294 if (ebx == 0x0e) bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 295 return SPEEDSTEP_CPU_P4M; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 296 break; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 297 case 9: ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 298 /* ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 299 * D-stepping [M-P4-M or M-P4/533] ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 300 * ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 301 * this is totally strange: CPUID 0x0F29 is ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 302 * used by M-P4-M, M-P4/533 and(!) Celeron CPUs. ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 303 * The latter need to be sorted out as they don't ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 304 * support speedstep. ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 305 * Celerons with CPUID 0x0F29 may have either ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 306 * ebx=0x8 or 0xf -- 25130917.pdf doesn't say anything ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 307 * specific. ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 308 * M-P4-Ms may have either ebx=0xe or 0xf [see above] ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 309 * M-P4/533 have either ebx=0xe or 0xf. [25317607.pdf] ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 310 * also, M-P4M HTs have ebx=0x8, too bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 311 * For now, they are distinguished by the model_id bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 312 * string ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 313 */ bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 314 if ((ebx == 0x0e) || bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 315 (strstr(c->x86_model_id, bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 316 "Mobile Intel(R) Pentium(R) 4") != NULL)) bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 317 return SPEEDSTEP_CPU_P4M; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 318 break; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 319 default: ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 320 break; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 321 } ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 322 return 0; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 323 } ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 324 ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 325 switch (c->x86_model) { ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 326 case 0x0B: /* Intel PIII [Tualatin] */ bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 327 /* cpuid_ebx(1) is 0x04 for desktop PIII, bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 328 * 0x06 for mobile PIII-M */ ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 329 ebx = cpuid_ebx(0x00000001); 2d06d8c4 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dominik Brodowski 2011-03-27 330 pr_debug("ebx is %x\n", ebx); ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 331 ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 332 ebx &= 0x000000FF; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 333 ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 334 if (ebx != 0x06) ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 335 return 0; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 336 ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 337 /* So far all PIII-M processors support SpeedStep. See ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 338 * Intel's 24540640.pdf of June 2003 ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 339 */ bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 340 return SPEEDSTEP_CPU_PIII_T; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 341 ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 342 case 0x08: /* Intel PIII [Coppermine] */ ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 343 ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 344 /* all mobile PIII Coppermines have FSB 100 MHz ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 345 * ==> sort out a few desktop PIIIs. */ ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 346 rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi); 2d06d8c4 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dominik Brodowski 2011-03-27 347 pr_debug("Coppermine: MSR_IA32_EBL_CR_POWERON is 0x%x, 0x%x\n", bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 348 msr_lo, msr_hi); ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 349 msr_lo &= 0x00c0000; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 350 if (msr_lo != 0x0080000) ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 351 return 0; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 352 ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 353 /* ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 354 * If the processor is a mobile version, ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 355 * platform ID has bit 50 set ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 356 * it has SpeedStep technology if either ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 357 * bit 56 or 57 is set ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 358 */ ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 359 rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi); 2d06d8c4 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dominik Brodowski 2011-03-27 360 pr_debug("Coppermine: MSR_IA32_PLATFORM ID is 0x%x, 0x%x\n", bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 361 msr_lo, msr_hi); bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 362 if ((msr_hi & (1<<18)) && bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 363 (relaxed_check ? 1 : (msr_hi & (3<<24)))) { ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 364 if (c->x86_mask == 0x01) { 2d06d8c4 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dominik Brodowski 2011-03-27 365 pr_debug("early PIII version\n"); bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 366 return SPEEDSTEP_CPU_PIII_C_EARLY; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 367 } else bbfebd66 arch/x86/kernel/cpu/cpufreq/speedstep-lib.c Dave Jones 2009-01-17 368 return SPEEDSTEP_CPU_PIII_C; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 369 } 9bc70e69 drivers/cpufreq/speedstep-lib.c Gustavo A. R. Silva 2017-10-12 370 /* fall through */ ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 371 default: ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 372 return 0; ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 373 } ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 374 } ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 375 EXPORT_SYMBOL_GPL(speedstep_detect_processor); ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 376 ^1da177e arch/i386/kernel/cpu/cpufreq/speedstep-lib.c Linus Torvalds 2005-04-16 377 :::::: The code at line 275 was first introduced by commit :::::: 2d06d8c49afdcc9bb35a85039fa50f0fe35bd40e [CPUFREQ] use dynamic debug instead of custom infrastructure :::::: TO: Dominik Brodowski :::::: CC: Dave Jones --- 0-DAY kernel test infrastructure Open Source Technology Center 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