From: Thomas Zeitlhofer <thomas.zeitlhofer+lkml@ze-it.at>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Hugh Dickins <hughd@google.com>
Cc: linux-kernel@vger.kernel.org
Subject: Re: "BUG: using smp_processor_id() in preemptible" with KPTI on 4.14.11
Date: Thu, 4 Jan 2018 11:20:29 +0100 [thread overview]
Message-ID: <20180104102029.tpv5utpbdkrisgvl@toau> (raw)
In-Reply-To: <20180104015906.czhm7kis33iizsia@toau>
On Thu, Jan 04, 2018 at 02:59:06AM +0100, Thomas Zeitlhofer wrote:
> Hello,
>
> on an Ivybridge CPU, I get with 4.14.11:
>
> BUG: using smp_processor_id() in preemptible [00000000] code: ovsdb-server/4510
> caller is native_flush_tlb_single+0x57/0xc0
> CPU: 3 PID: 4510 Comm: ovsdb-server Not tainted 4.14.11-kvm-00434-gcd0b8eb84f5c #3
> Hardware name: MSI MS-7798/B75MA-P45 (MS-7798), BIOS V1.9 09/30/2013
> Call Trace:
> dump_stack+0x5c/0x86
> check_preemption_disabled+0xdd/0xe0
> native_flush_tlb_single+0x57/0xc0
> ? __set_pte_vaddr+0x2d/0x40
> __set_pte_vaddr+0x2d/0x40
> set_pte_vaddr+0x2f/0x40
> cea_set_pte+0x30/0x40
> ds_update_cea.constprop.4+0x4d/0x70
> reserve_ds_buffers+0x159/0x410
> ? wp_page_copy+0x36d/0x6a0
> x86_reserve_hardware+0x150/0x160
> x86_pmu_event_init+0x3e/0x1f0
> perf_try_init_event+0x69/0x80
> perf_event_alloc+0x652/0x740
> SyS_perf_event_open+0x3f6/0xd60
> do_syscall_64+0x5c/0x190
> entry_SYSCALL64_slow_path+0x25/0x25
> RIP: 0033:0x74a1d94580b9
> RSP: 002b:00007fff0c01d5d8 EFLAGS: 00000206 ORIG_RAX: 000000000000012a
> RAX: ffffffffffffffda RBX: 00007fff0c01d7b0 RCX: 000074a1d94580b9
> RDX: 00000000ffffffff RSI: 0000000000000000 RDI: 00007fff0c01d5e0
> RBP: 0000000000000000 R08: 0000000000000000 R09: 0000007000000000
> R10: 00000000ffffffff R11: 0000000000000206 R12: 0000000000000008
> R13: 0000000000000000 R14: 00007fff0c01d790 R15: 00005df43a799600
>
> This does not show up when booting with pti=off.
>
> Maybe it is related to the issue that is fixed for the upcoming 4.4.110
> release by https://lkml.org/lkml/2018/1/3/692
JFYI, the very same kernel does not show this issue on a Haswell CPU.
Thanks,
Thomas
next prev parent reply other threads:[~2018-01-04 10:20 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-04 1:59 Thomas Zeitlhofer
2018-01-04 10:20 ` Thomas Zeitlhofer [this message]
2018-01-04 10:51 ` Greg Kroah-Hartman
2018-01-04 12:43 ` Thomas Zeitlhofer
2018-01-04 12:55 ` Greg Kroah-Hartman
2018-01-04 15:25 ` Thomas Zeitlhofer
2018-01-04 15:37 ` Thomas Gleixner
2018-01-04 17:07 ` Peter Zijlstra
2018-01-04 18:38 ` Thomas Zeitlhofer
2018-01-06 21:38 ` Thomas Zeitlhofer
2018-01-07 8:17 ` Greg Kroah-Hartman
2018-01-07 8:53 ` Thomas Zeitlhofer
2018-01-08 0:37 ` Thomas Zeitlhofer
2018-01-04 22:11 ` [tip:x86/pti] x86/events/intel/ds: Use the proper cache flush method for mapping ds buffers tip-bot for Peter Zijlstra
2018-01-04 23:49 ` tip-bot for Peter Zijlstra
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