From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751918AbeAEJ5J (ORCPT + 1 other); Fri, 5 Jan 2018 04:57:09 -0500 Received: from mail-sh2.amlogic.com ([58.32.228.45]:38215 "EHLO mail-sh2.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751563AbeAEJ43 (ORCPT ); Fri, 5 Jan 2018 04:56:29 -0500 From: Yixun Lan To: Kevin Hilman , CC: Neil Armstrong , Jerome Brunet , Rob Herring , Mark Rutland , Carlo Caione , Yixun Lan , , , Subject: [PATCH 3/6] ARM64: dts: meson-axg: uart: Add the clock info description Date: Fri, 5 Jan 2018 17:56:18 +0800 Message-ID: <20180105095621.196472-4-yixun.lan@amlogic.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180105095621.196472-1-yixun.lan@amlogic.com> References: <20180105095621.196472-1-yixun.lan@amlogic.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.18.20.164] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: Add the clock info description for the EE UART controller. Signed-off-by: Yixun Lan --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 9636a7c5f6ed..f6bf01cfff4b 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -146,6 +146,8 @@ reg = <0x0 0x24000 0x0 0x18>; interrupts = ; status = "disabled"; + clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; }; uart_B: serial@23000 { @@ -153,6 +155,8 @@ reg = <0x0 0x23000 0x0 0x18>; interrupts = ; status = "disabled"; + clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; }; }; -- 2.15.1