From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752651AbeAIJab (ORCPT + 1 other); Tue, 9 Jan 2018 04:30:31 -0500 Received: from mail-pg0-f67.google.com ([74.125.83.67]:41433 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752642AbeAIJaZ (ORCPT ); Tue, 9 Jan 2018 04:30:25 -0500 X-Google-Smtp-Source: ACJfBourYDLygDwRnXWrgQCqlgt18VY4Ps9xuWezDq+MMAkp5lh/laKnZOXYSeeTnYgWzsBd++QTWQ== Date: Tue, 9 Jan 2018 17:30:15 +0800 From: Dong Aisheng To: Stefan Agner Cc: Rob Herring , shawnguo@kernel.org, kernel@pengutronix.de, fabio.estevam@nxp.com, mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bai Ping , linux-imx@nxp.com Subject: Re: [PATCH 3/7] ARM: dts: imx6ull: add additional pinfunc defines for i.MX 6ULL Message-ID: <20180109093015.GC26312@b29396-OptiPlex-7040> References: <20180102164223.15230-1-stefan@agner.ch> <20180102164223.15230-3-stefan@agner.ch> <20180105164930.qomk75eo7vzyglvn@rob-hp-laptop> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On Sun, Jan 07, 2018 at 10:52:39AM +0100, Stefan Agner wrote: > On 2018-01-05 17:49, Rob Herring wrote: > > On Tue, Jan 02, 2018 at 05:42:19PM +0100, Stefan Agner wrote: > >> From: Bai Ping > >> > >> On i.MX 6ULL, the pin MUX and CTRL register of BOOT_MODEx and TAMPERx > >> pins are available through IOMUXC_SNVS. Add additional pinfunc defines. > >> > >> Signed-off-by: Bai Ping > >> Signed-off-by: Stefan Agner > >> --- > >> arch/arm/boot/dts/imx6ull-pinfunc-snvs.h | 29 +++++++++++++++++++++++++++++ > >> arch/arm/boot/dts/imx6ull.dtsi | 1 + > >> 2 files changed, 30 insertions(+) > >> create mode 100644 arch/arm/boot/dts/imx6ull-pinfunc-snvs.h > >> > >> diff --git a/arch/arm/boot/dts/imx6ull-pinfunc-snvs.h b/arch/arm/boot/dts/imx6ull-pinfunc-snvs.h > >> new file mode 100644 > >> index 000000000000..da3f412e4269 > >> --- /dev/null > >> +++ b/arch/arm/boot/dts/imx6ull-pinfunc-snvs.h > >> @@ -0,0 +1,29 @@ > >> +/* > >> + * Copyright (C) 2016 Freescale Semiconductor, Inc. > > > > It's 2018 now. > > > > I don't think you are supposed to chance copyright year unless you > change it significantly. > > At least that article suggests so: > https://www.copyrightlaws.com/copyright-notice-year/ > > I took that patch from the downstream NXP kernel, so I guess 2016 was > the year of first publication... > Can you help add below copyright if you keep NXP sign-off as Author? Then you don't need delete the old one. Copyright 2017 NXP. And SPDX mentioned by Rob. Otherwise, Acked-by: Dong Aisheng Regards Dong Aisheng > >> + * > >> + * This program is free software; you can redistribute it and/or modify > >> + * it under the terms of the GNU General Public License version 2 as > >> + * published by the Free Software Foundation. > > > > Use SPDX. With that, > > Agreed. > > > > > Reviewed-by: Rob Herring > > -- > Stefan