From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753323AbeAIJoF (ORCPT + 1 other); Tue, 9 Jan 2018 04:44:05 -0500 Received: from mail-pf0-f195.google.com ([209.85.192.195]:37089 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752807AbeAIJoA (ORCPT ); Tue, 9 Jan 2018 04:44:00 -0500 X-Google-Smtp-Source: ACJfBouGZMWt8BpxZxwTtBwjkMkdmYGnpRWJ7JJDc4YXLkxymBoW/L5ZB5Jnq3314gJXgvHz7nr81A== Date: Tue, 9 Jan 2018 17:43:48 +0800 From: Dong Aisheng To: Anson Huang Cc: horia.geanta@nxp.com, aymen.sghaier@nxp.com, herbert@gondor.apana.org.au, davem@davemloft.net, robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, kernel@pengutronix.de, fabio.estevam@nxp.com, linux@armlinux.org.uk, mturquette@baylibre.com, sboyd@codeaurora.org, adriana.reus@nxp.com, stefan@agner.ch, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-imx@nxp.com Subject: Re: [PATCH V3 1/2] clk: imx: imx7d: add the snvs clock Message-ID: <20180109094348.GG26312@b29396-OptiPlex-7040> References: <1515489651-13488-1-git-send-email-Anson.Huang@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1515489651-13488-1-git-send-email-Anson.Huang@nxp.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On Tue, Jan 09, 2018 at 05:20:50PM +0800, Anson Huang wrote: > According to the i.MX7D Reference Manual, > SNVS block has a clock gate, accessing SNVS block > would need this clock gate to be enabled, add it > into clock tree so that SNVS module driver can > operate this clock gate. > > Signed-off-by: Anson Huang You missed the last round review tags. Regards Dong Aisheng