From mboxrd@z Thu Jan 1 00:00:00 1970 Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965387AbeAJMCN (ORCPT + 1 other); Wed, 10 Jan 2018 07:02:13 -0500 Received: from heliosphere.sirena.org.uk ([172.104.155.198]:53422 "EHLO heliosphere.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964973AbeAJMCK (ORCPT ); Wed, 10 Jan 2018 07:02:10 -0500 Date: Wed, 10 Jan 2018 12:02:07 +0000 From: Mark Brown To: "Andrew F. Davis" Cc: linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/3] regcache: flat: Add valid bit to this cache type Message-ID: <20180110120207.GE9003@sirena.org.uk> References: <20180107232234.11064-1-afd@ti.com> <20180107232234.11064-3-afd@ti.com> <20180108120801.GD11698@sirena.org.uk> <4daf0acd-2d50-5873-212e-618e7b6d8123@ti.com> <20180108163606.GH11698@sirena.org.uk> <03e5f22a-b08b-9923-61fe-be93588c4967@ti.com> <20180109162456.GB11471@sirena.org.uk> <6767739a-fc25-d92a-7466-26f0c226aabc@ti.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="AsxXAMtlQ5JHofzM" Content-Disposition: inline In-Reply-To: <6767739a-fc25-d92a-7466-26f0c226aabc@ti.com> X-Cookie: Victory or defeat! User-Agent: Mutt/1.9.2 (2017-12-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: --AsxXAMtlQ5JHofzM Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Jan 09, 2018 at 11:47:19AM -0600, Andrew F. Davis wrote: > On 01/09/2018 10:24 AM, Mark Brown wrote: > > That's a bit strong; we just used the supplied defaults from bss after > > all! Feel free to contribute documentation. > I meant it to be strong, a cache that never consults the backing storage > and requires write-allocate or pre-warming to every single location is > wrong, not just an odd type that requires more documentation. The devices the cache infrastructure was originally designed for don't have readback support in the hardware and people hardly ever error check reads so we have the assumptions we have. =20 > > If you have the time and enthusiasm to do the audit that ensures that > > this happens then go for it; we can't just go and cause regressions for > > users who have devices that are currently working fine even if it's only > > by chance. > I would like to help here, what would be involved? Look through all the devices, do something to make sure that their uses make sense and have a list of the ones that remain explaining why they're safe. > A quick looks shows 42 instances of use of this cache type, of these > only 8 do not define a readable table or have defaults for every register: > sound/soc/sunxi/sun8i-codec.c > sound/soc/codecs/msm8916-wcd-digital.c > sound/soc/atmel/atmel-classd.c > drivers/pwm/pwm-fsl-ftm.c > drivers/mfd/sec-core.c > drivers/media/i2c/max2175.c > drivers/iio/health/max30100.c > drivers/i2c/muxes/i2c-mux-ltc4306.c > The are the only ones that should need to be looked at, and setting a > table of all zero reg_defaults would restore the old behavior until each > could be confirmed to be unaffected by this change. A lot of those should probably be converted to rbtree (sec-core will never suspend for example). =20 --AsxXAMtlQ5JHofzM Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAlpWAL4ACgkQJNaLcl1U h9Dhewf+LlGBA3MfLpy8zVoHdqDoSZcALUc5kOblLCDWJkEtHeFbr/nVZK78Ltu8 5CsFYA828NVVZek7cwvoAdCOfciG6yKiddu6zgAxBe2LTIMb3mHK483xzyJKYaOy m8zuyFDKb8uvpWl0KTOWAxh5+gGJfJV3uOjALRwNaLjqsf/K/9wHTh00wSWFGcoJ ymZiu6L0vZKvBc8HlWz3qS3iJN4T/7zuG+lNeRm0EW8gU/FSQqSgQ23gf99Oo/Fs 0sqXE++5TxuqH8hMftBKjF5CjgbgxP1lo8N5cb0X8wQdpE5CnNWCS2gOiPVfK/YU zOQ6bK6JxBaPtZQ1Y5jj//90DAsIDA== =gvxX -----END PGP SIGNATURE----- --AsxXAMtlQ5JHofzM--