mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Thierry Escande <thierry.escande@collabora.com>
To: Archit Taneja <architt@codeaurora.org>,
	Inki Dae <inki.dae@samsung.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Sandy Huang <hjc@rock-chips.com>,
	Sean Paul <seanpaul@chromium.org>,
	David Airlie <airlied@linux.ie>
Cc: "Tomasz Figa" <tfiga@chromium.org>,
	"Haixia Shi" <hshi@chromium.org>,
	"Ørjan Eide" <orjan.eide@arm.com>,
	"zain wang" <wzz@rock-chips.com>,
	"Yakir Yang" <ykk@rock-chips.com>,
	"Lin Huang" <hl@rock-chips.com>,
	"Douglas Anderson" <dianders@chromium.org>,
	"Mark Yao" <mark.yao@rock-chips.com>,
	linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
	dri-devel@lists.freedesktop.org
Subject: [PATCH 08/40] drm/rockchip: Remove analogix psr worker
Date: Mon, 15 Jan 2018 18:15:42 +0100	[thread overview]
Message-ID: <20180115171614.14474-9-thierry.escande@collabora.com> (raw)
In-Reply-To: <20180115171614.14474-1-thierry.escande@collabora.com>

From: Sean Paul <seanpaul@chromium.org>

Now that the spinlocks and timers are gone, we can remove the psr
worker located in rockchip's analogix driver and do the enable/disable
directly. This should simplify the code and remove races on disable.

Cc: 征增 王 <wzz@rock-chips.com>
Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
---
 drivers/gpu/drm/rockchip/analogix_dp-rockchip.c | 31 ++-----------------------
 1 file changed, 2 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
index 7d76ff47028d..36334839a3f8 100644
--- a/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
+++ b/drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
@@ -71,10 +71,6 @@ struct rockchip_dp_device {
 	struct regmap            *grf;
 	struct reset_control     *rst;
 
-	struct work_struct	 psr_work;
-	struct mutex             psr_lock;
-	unsigned int             psr_state;
-
 	const struct rockchip_dp_chip_data *data;
 
 	struct analogix_dp_device *adp;
@@ -84,28 +80,13 @@ struct rockchip_dp_device {
 static void analogix_dp_psr_set(struct drm_encoder *encoder, bool enabled)
 {
 	struct rockchip_dp_device *dp = to_dp(encoder);
+	int ret;
 
 	if (!analogix_dp_psr_supported(dp->adp))
 		return;
 
 	DRM_DEV_DEBUG(dp->dev, "%s PSR...\n", enabled ? "Entry" : "Exit");
 
-	mutex_lock(&dp->psr_lock);
-	if (enabled)
-		dp->psr_state = EDP_VSC_PSR_STATE_ACTIVE;
-	else
-		dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE;
-
-	schedule_work(&dp->psr_work);
-	mutex_unlock(&dp->psr_lock);
-}
-
-static void analogix_dp_psr_work(struct work_struct *work)
-{
-	struct rockchip_dp_device *dp =
-				container_of(work, typeof(*dp), psr_work);
-	int ret;
-
 	ret = rockchip_drm_wait_vact_end(dp->encoder.crtc,
 					 PSR_WAIT_LINE_FLAG_TIMEOUT_MS);
 	if (ret) {
@@ -113,12 +94,10 @@ static void analogix_dp_psr_work(struct work_struct *work)
 		return;
 	}
 
-	mutex_lock(&dp->psr_lock);
-	if (dp->psr_state == EDP_VSC_PSR_STATE_ACTIVE)
+	if (enabled)
 		analogix_dp_enable_psr(dp->adp);
 	else
 		analogix_dp_disable_psr(dp->adp);
-	mutex_unlock(&dp->psr_lock);
 }
 
 static int rockchip_dp_pre_init(struct rockchip_dp_device *dp)
@@ -135,8 +114,6 @@ static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data)
 	struct rockchip_dp_device *dp = to_dp(plat_data);
 	int ret;
 
-	cancel_work_sync(&dp->psr_work);
-
 	ret = clk_prepare_enable(dp->pclk);
 	if (ret < 0) {
 		DRM_DEV_ERROR(dp->dev, "failed to enable pclk %d\n", ret);
@@ -355,10 +332,6 @@ static int rockchip_dp_bind(struct device *dev, struct device *master,
 	dp->plat_data.power_off = rockchip_dp_powerdown;
 	dp->plat_data.get_modes = rockchip_dp_get_modes;
 
-	mutex_init(&dp->psr_lock);
-	dp->psr_state = ~EDP_VSC_PSR_STATE_ACTIVE;
-	INIT_WORK(&dp->psr_work, analogix_dp_psr_work);
-
 	ret = rockchip_drm_psr_register(&dp->encoder, analogix_dp_psr_set);
 	if (ret < 0)
 		goto err_cleanup_encoder;
-- 
2.14.1

  parent reply	other threads:[~2018-01-15 17:28 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-15 17:15 [PATCH 00/40] DRM Rockchip rk3399 (Kevin) Thierry Escande
2018-01-15 17:15 ` [PATCH 01/40] drm/rockchip: Get rid of some unnecessary code Thierry Escande
2018-01-16  3:53   ` Tomasz Figa
2018-01-15 17:15 ` [PATCH 02/40] drm/rockchip: support prime import sg table Thierry Escande
2018-01-22 10:44   ` Heiko Stuebner
2018-01-15 17:15 ` [PATCH 03/40] drm/rockchip: Respect page offset for PRIME mmap calls Thierry Escande
2018-01-22 10:44   ` Heiko Stuebner
2018-01-15 17:15 ` [PATCH 04/40] drm/bridge: analogix_dp: set psr activate/deactivate when enable/disable bridge Thierry Escande
2018-01-15 17:15 ` [PATCH 05/40] drm/bridge: analogix_dp: Don't power bridge in analogix_dp_bind Thierry Escande
2018-01-15 17:15 ` [PATCH 06/40] drm/rockchip: Don't use atomic constructs for psr Thierry Escande
2018-01-15 17:15 ` [PATCH 07/40] drm/bridge: analogix_dp: detect Sink PSR state after configuring the PSR Thierry Escande
2018-01-15 17:15 ` Thierry Escande [this message]
2018-01-15 17:15 ` [PATCH 09/40] drm/bridge: analogix_dp: Don't change psr while bridge is disabled Thierry Escande
2018-01-15 17:15 ` [PATCH 10/40] drm/rockchip: add mutex vop lock Thierry Escande
2018-01-15 17:15 ` [PATCH 11/40] drm/bridge: analogix_dp: add fast link train for eDP Thierry Escande
2018-01-15 17:15 ` [PATCH 12/40] drm/rockchip: Only wait for panel ACK on PSR entry Thierry Escande
2018-01-15 17:15 ` [PATCH 13/40] drm/bridge: analogix_dp: Move enable video into config_video() Thierry Escande
2018-01-15 17:15 ` [PATCH 14/40] drm/bridge: analogix_dp: Check AUX_EN status when doing AUX transfer Thierry Escande
2018-01-15 17:15 ` [PATCH 15/40] drm/bridge: analogix_dp: Don't use fast link training when panel just powered up Thierry Escande
2018-01-15 17:15 ` [PATCH 16/40] drm/bridge: analogix_dp: Retry bridge enable when it failed Thierry Escande
2018-01-15 17:15 ` [PATCH 17/40] drm/bridge: analogix_dp: Wait for HPD signal before configuring link Thierry Escande
2018-01-15 17:15 ` [PATCH 18/40] drm/bridge: analogix_dp: Set PD_INC_BG first when powering up edp phy Thierry Escande
2018-01-15 17:15 ` [PATCH 19/40] drm/bridge: analogix_dp: Ensure edp is disabled when shutting down the panel Thierry Escande
2018-01-15 17:15 ` [PATCH 20/40] drm/bridge: analogix_dp: Extend hpd check time to 100ms Thierry Escande
2018-01-15 17:15 ` [PATCH 21/40] drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode Thierry Escande
2018-01-15 17:15 ` [PATCH 22/40] drm/bridge: analogix_dp: Check dpcd write/read status Thierry Escande
2018-01-15 17:15 ` [PATCH 23/40] drm/bridge: analogix_dp: Fix AUX_PD bit for Rockchip Thierry Escande
2018-01-15 17:15 ` [PATCH 24/40] drm/bridge: analogix_dp: Reset aux channel if an error occurred Thierry Escande
2018-01-15 17:15 ` [PATCH 25/40] drm/rockchip: Restore psr->state when enable/disable psr failed Thierry Escande
2018-01-15 17:16 ` [PATCH 26/40] drm/bridge: analogix_dp: Don't use ANALOGIX_DP_PLL_CTL to control pll Thierry Escande
2018-01-15 17:16 ` [PATCH 27/40] drm/bridge: analogix_dp: Fix timeout of video streamclk config Thierry Escande
2018-01-15 17:16 ` [PATCH 28/40] drm/bridge: analogix_dp: Fix incorrect operations with register ANALOGIX_DP_FUNC_EN_1 Thierry Escande
2018-01-15 17:16 ` [PATCH 29/40] drm/bridge: analogix_dp: Move fast link training detect to set_bridge Thierry Escande
2018-01-15 17:16 ` [PATCH 30/40] drm/rockchip: Flush PSR before committing modeset disables/enables Thierry Escande
2018-01-16  4:02   ` Tomasz Figa
2018-01-15 17:16 ` [PATCH 31/40] drm/bridge: analogix_dp: Allow master driver to cleanup in unbind Thierry Escande
2018-01-15 17:16 ` [PATCH 32/40] drm/bridge: analogix_dp: Add analogix_dp_shutdown Thierry Escande
2018-01-15 17:16 ` [PATCH 33/40] drm/rockchip: analogix_dp: Wire the shutdown callback to disable PSR Thierry Escande
2018-01-15 17:16 ` [PATCH 34/40] drm/bridge: analogix_dp: Reorder plat_data->power_off to happen sooner Thierry Escande
2018-01-15 17:16 ` [PATCH 35/40] drm/bridge: analogix_dp: Properly log AUX CH errors Thierry Escande
2018-01-15 17:16 ` [PATCH 36/40] drm/bridge: analogix_dp: Properly disable aux chan retries on rockchip Thierry Escande
2018-01-15 17:16 ` [PATCH 37/40] drm/panel: simple: Change mode for Sharp lq123p1jx31 Thierry Escande
2018-01-15 17:16 ` [PATCH 38/40] drm/rockchip: pre dither down when output bpc is 8bit Thierry Escande
2018-01-15 17:16 ` [PATCH 39/40] drm/rockchip: analogix_dp: Fix invalid implementation of unbind Thierry Escande
2018-01-16  2:10   ` Tomasz Figa
2018-01-15 17:16 ` [PATCH 40/40] drm/bridge: analogix_dp: Split the platform-specific poweron in two parts Thierry Escande

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180115171614.14474-9-thierry.escande@collabora.com \
    --to=thierry.escande@collabora.com \
    --cc=airlied@linux.ie \
    --cc=architt@codeaurora.org \
    --cc=dianders@chromium.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=hjc@rock-chips.com \
    --cc=hl@rock-chips.com \
    --cc=hshi@chromium.org \
    --cc=inki.dae@samsung.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-rockchip@lists.infradead.org \
    --cc=mark.yao@rock-chips.com \
    --cc=orjan.eide@arm.com \
    --cc=seanpaul@chromium.org \
    --cc=tfiga@chromium.org \
    --cc=thierry.reding@gmail.com \
    --cc=wzz@rock-chips.com \
    --cc=ykk@rock-chips.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®